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this driver was written by Pyun YongHyeon from FreeBSD.
"go ahead" deraadt@
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defined; cp0access.S relies on this.
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in the kernel to be brought in, due to invasive differences in tlb operation.
Comes with a separate cache operations file due to the cache being R5k-style
with R10k-style way number encoding.
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L1 caches sizes; fix the masking accordingly.
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This code needs to be cleaned up, and made more generic to work with other
processors counters as well.
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the Yeelong Lemote mips-based netbook. Kernel bits only for now, needs
polishing; most of this work done during h2k9 last month, although the
porting effort started earlier this year.
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Now instead of the global object hashtable, we have a per object tree.
Testing shows no performance difference and a slight code shrink. OTOH when
locking is more fine grained this should be faster due to lock contention on
uvm.hashlock.
ok thib@, art@.
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the Yeelong Lemote mips-based netbook. Kernel bits only for now, needs
polishing; most of this work done during h2k9 last month, although the
porting effort started earlier this year.
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ok markus@
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the Yeelong Lemote mips-based netbook. Kernel bits only for now, needs
polishing; most of this work done during h2k9 last month, although the
porting effort started earlier this year.
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the Yeelong Lemote mips-based netbook. Kernel bits only for now, needs
polishing; most of this work done during h2k9 last month, although the
porting effort started earlier this year.
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the Yeelong Lemote mips-based netbook. Kernel bits only for now, needs
polishing; most of this work done during h2k9 last month, although the
porting effort started earlier this year.
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after c2k9
allows buffer cache to be extended and grow/shrink dynamically
tested by many, ok oga@, "why not just commit it" deraadt@
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for this prevents it to be invoked with DVACT_DEACTIVATE later. This had
been sweeped some time ago already, but bad constructs crept in again.
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would do manually.
sparc64 does a similar thing already.
ok kettenis@
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the Yeelong Lemote mips-based netbook. Kernel bits only for now, needs
polishing; most of this work done during h2k9 last month, although the
porting effort started earlier this year.
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the Yeelong Lemote mips-based netbook. Kernel bits only for now, needs
polishing; most of this work done during h2k9 last month, although the
porting effort started earlier this year.
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the Yeelong Lemote mips-based netbook. Kernel bits only for now, needs
polishing; most of this work done during h2k9 last month, although the
porting effort started earlier this year.
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or'ed together, even on platforms where bus_space_barrier() ignores the
barrier argument yet.
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provide and use BUS_SPACE_BARRIER_xxx.
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ok miod@
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that function. It seems this function was intended to be called with
interrupts disabled but that is not (no longer?) the case. As a result
there were some races accessing the list of interrupt handlers and we would
leave the function with interrupts disabled if there were any interrupts
pending. This could make us end up in the idle loop with interrupts disabled,
which would "hang" the machine.
Found with help from deraadt@
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of the pcb and using the p_addr member of 'struct proc' to calculate the
address of the kernel stack when switching to virtual mode after taking a trap.
Remove the now unecessary cache flushes; they're actually harmful since they
create non-equivalent aliases. This seems to fix the memory corruption we
have been observing from time to time.
This diff does not rename fpu_curpcb, which is now somewhat incorrectly named.
I hope to change things back again as soon as we are able to map the pcb 1:1.
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makes Enhanced SpeedStep work on new machines, but requires
acpimadt0 to be enabled.
ok by jsg@ and claudio@
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bus_space_handle_t, pass them ioc's own bus_space_handle and bus_space_tag,
and have the children use bus_space_subregion() on it.
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checks if option DIAGNOSTIC.
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with only the available range free, instead of that range only.
ok kettenis@
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bus_space_alloc() as a bitmask of flags, and not a boolean controlling
cacheability; and make sure the three MI BUS_SPACE_MAP_xxx values documented
in the manual page are defined on all platforms as well.
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batch = pdemask == sva && sva + ~PDE_MASK + 1 <= eva;
with something that's a little bit easier to read.
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ok miod@
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whether removing holes or parts of them is allowed or not.
Only allow hole removal in uvmspace_free(), when tearing the vmspace down.
ok art@
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range covered by the next PDE and not somewhere in the middle. The old could
have skipped over some valid PTE's causing them to stay behind in the pmap.
Since we would not flush the cache for those pages either this could also
cause memory corruption when dirty cache lines would be written back to
memory at a later stage.
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ok kettenis
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ok kettenis@
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ok miod@
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ok miod@
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ok miod@
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PCI ROM into account, if any.
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their ROM if they have any.
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caller deal with this; this really makes the PMAP_CANFAIL logic work.
ok kettenis@
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