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AgeCommit message (Collapse)Author
2023-04-13Sprinkle UL suffix to constant literals which don't fit in int. NFCIMiod Vallat
2023-04-13Grammar fixes in comments.Miod Vallat
2023-04-13pmap_copy() has never, ever, been implemented in any of the platforms OpenBSDMiod Vallat
ever ran on, and it's unlikely to ever be implemented, so remove it. ok jsg@
2023-04-13Remove intentionally undocumented pci_{io,mem}_find and convert their lastMiod Vallat
few users to pci_mapreg_info(). ok jsg@
2023-04-13Move USRSTACK to the end of userland address space.Miod Vallat
2023-04-13remove duplicate includesJonathan Gray
ok deraadt@ miod@ krw@
2023-04-12remove unused buffer selection codeJonathan Gray
ok visa@
2023-04-11fix double words in commentsJonathan Gray
feedback and ok jmc@ miod, ok millert@
2023-04-10add missing write of SAB_DAFOJonathan Gray
ok miod@ who tested on Ultra 5
2023-04-10Enable caps lock LED on modern Apple laptop keyboards.Tobias Heider
ok kettenis@ patrick@
2023-04-10spellingJonathan Gray
2023-04-09So clang 13 miscompiles dev/usb/umass_scsi.c with the combination if -OzMark Kettenis
and -mbranch-protection=bti. So turn off the BTI protection in ramdisk kernels for now. ok deraadt@, miod@, phessler@
2023-04-07avoid use of uninitialised memoryJonathan Gray
ok miod@ kettenis@
2023-04-03enable rkusbphy(4)David Gwynne
2023-04-02nable ngbe(4) on install media. Passes 'make release' build.Kevin Lo
Pointed out by miod@, patrick@
2023-04-01Enable rkiovd(4)Mark Kettenis
2023-03-31Enable ufshci(4).Marcus Glocker
ok kettenis@
2023-03-31Enable ngbe(4).Kevin Lo
ok miod@
2023-03-30Map device tree read/write to unbreak root on softraidKlemens Nanni
Since r1.76 "Get rid of pmap_map_early()" the FDT was mapped read-only, but CRYPTO softraid code writes it to zero out the key. Found and tested by me; explanation and fix from kettenis. OK kettenis
2023-03-27Implement branch target protection using the branch target identificationMark Kettenis
feature introduced in Armv8.5. This provides "head-CFI" to complement the "tail-CFI" provided by retguard. Unfortunately most arm64 machines don't support this feature yet. But Apple M2 does support it and it seems to work there. ok deraadt@
2023-03-27Show BT and SBSS features in dmesg.Mark Kettenis
ok deraadt@
2023-03-26amd64: identify IBT capability in cpu(4) dmesg linesMike Larkin
requested by and ok deraadt@
2023-03-26fix a memory leakJonathan Gray
feedback kettenis@ ok miod@
2023-03-23avoid use after freeJonathan Gray
ok miod@ kettenis@
2023-03-19Aggressively randomize the location of the stack on all 64-bit architecturesMark Kettenis
except alpha. This will put the stack at a random location in the upper 1/4th of the userland virtual address space providing up to 26 additional bits of randomness in the address. Skip alpha for now since it currently puts the stack at a (for a 64-bit architecture) very low address. Skip 32-bit architectures for now as well since those have a much smaller virtual address space and we need more time to figure out what a safe amount of extra randomizations is. These architectures will continue to use a mildly randomized stack address through the existing stackgap random mechanism. We will revisit this after 7.3 is released. This should make it harder for an attacker to find the stack. ok deraadt@, miod@
2023-03-19Enable rkpciephy(40.Mark Kettenis
2023-03-17Move annoying yet harmless diagnostic message into #ifdef DEBUG.Miod Vallat
2023-03-15store bios version, needed for amdgpu Steam Deck quirkJonathan Gray
2023-03-14sync the boot options list, and some macro fixes;Jason McIntyre
ok miod
2023-03-13Switch alpha to new boot blocks.Miod Vallat
2023-03-13Add manual page.Miod Vallat
2023-03-13Add "machine poweroff" command on luna88k bootloader.Kenji Aoyama
ok miod@
2023-03-12sh, landisk: set HZ=64 againScott Soule Cheloha
The addition of HZ to sys/kernel.h in v1.26 overrides the default definition of HZ in sh/clock.c, changing landisk from HZ=64 to HZ=100. Explicitly set HZ=64 in the GENERIC and RAMDISK config(8) files to can change it from 100 back to 64. Not sure if this is the best thing, but it does fix the problem. Problem confirmed by, and fix tested by, miod@. ok miod@
2023-03-12Add rkcomphy(3), a driver for the "naneng" combo PHY found on the RK356xMark Kettenis
(and RK3588). This is a PIPE PHY with support for PCIe, SATA, USB3, SGMII and QSGMII. For now only PCIe, SATA and USB3 support are implemented. SATA support has not been tested. Also add the refernce clocks needed by the PHYs to rkclock(4). ok mlarkin@
2023-03-12Enable mvtemp(4)Jonathan Matthew
2023-03-11New alpha secondary boot blocks using the MI code base. Not linked to theMiod Vallat
build yet.
2023-03-11Remove long dead "tool".Miod Vallat
2023-03-11Allow strip and objcopy to be overrridden, for easier cross-buildability. NFCMiod Vallat
2023-03-11Add missing $OpenBSD$ tag.Kenji Aoyama
2023-03-09Check that a PCIe port isn't disabled in the device tree.Mark Kettenis
ok patrick@
2023-03-09workaround Intel Braswell/Cherry Trail mwait hangJonathan Gray
dlg has a Dell Wyse 3040 with cpu0: Intel(R) Atom(TM) x5-Z8350 CPU @ 1.44GHz, 480.02 MHz, 06-4c-04 cpu0: mwait min=64, max=64, C-substates=0.2.0.0.0.0.3.3, IBE which hangs soon after the login prompt with MP kernels This is a hardware bug described in: Intel Atom Z8000 Processor Series Specification Update Document Number: 332067-012 "CHT45 Processor May Not Wake From C6 or Deeper Sleep State" tested by dlg@, ok guenther@
2023-03-09Improve vnet(4) to work better in busy conditions.Claudio Jeker
No longer limit the ifq size to a low number, increase the slots on the DMA Ring a bit and abstract the VNET buffer size into a define. Enqueue packets on the ring but mark the initial packet ready at the end. This way the other ldom is not able to rush ahead and overconsume packets. The dring indexes are passed between ldoms and can get out of sync with causes the TX ring to stall. Tested by myself and jan@ OK kettenis@ jan@ kn@
2023-03-08amd64: lapic_timer_rearm: don't reset mode, mask, divisorScott Soule Cheloha
The apic timer mode, mask, and divisor are set during lapic_timer_trigger(). We don't need to reset them when rearming the timer. On physical hardware the difference is too small to measure, but skipping two apic writes may be a bit faster when we're running in a VM. Bochs also likes to log when the apic divisor is changed: 38569516308i[APIC0 ] set timer divide factor to 1 38569517335i[APIC0 ] set timer divide factor to 1 38569518042i[APIC0 ] set timer divide factor to 1 [...] With this change, Bochs is a lot less noisy. Idea from mlarkin@. ok mlarkin@
2023-03-08Delete obsolete /* ARGSUSED */ lint comments.Philip Guenther
ok miod@ millert@
2023-03-06In iskmemdev(), do not check for the minor of /dev/io. It has beenMiod Vallat
deprecated more than 25 years ago and removed more than 20. From Crystal Kolipe, thanks!
2023-03-05arm64 needs -DBOOT_STTY as well.Mark Kettenis
ok miod@
2023-03-05Mask off IPL flags before storing the IPL for an interrupt.Patrick Wildt
ok kettenis@ jmatthew@
2023-03-05Mask off IPL flags before storing the IPL for an interrupt.Jonathan Matthew
This fixes the IPL calculations in mpic_calc_mask() in the presence of IPL_MPSAFE interrupts such as mvneta(4). ok patrick@ kettenis@ dlg@
2023-03-04Enable ytphy(4) here too.Mark Kettenis
2023-03-04enable ytphy(4)Mark Kettenis