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AgeCommit message (Collapse)Author
2017-04-30Remove unused POW status functions. Makes clang happier.Visa Hankala
2017-04-29Decrement ci_idepth on all returns from agintc_irq_handler().Mark Kettenis
2017-04-29Add agintc(4), a driver for interrupt controllers conforming to ARM'sMark Kettenis
generic interrupt controller architecture specification v3/4. The hard work was done by drahn@, I just cleaned it up a bit and fixed a couple of bugs. ok patrick@, drahn@
2017-04-29Move the userret() call out of data_abort() and simply call it just before weMark Kettenis
return from do_el0_sync(). Prevents future mistakes.
2017-04-29Call refreshcreds() in ast() since we may get there without going throughMark Kettenis
do_el0_sync() or mi_syscall().
2017-04-29store cpu model information in the buffer used by the hw.model sysctlJonathan Gray
ok kettenis@
2017-04-28add some comments. no functional changeMike Larkin
2017-04-28vmm: don't use invvpid if we didn't detect vpid capability duringMike Larkin
vcpu setup
2017-04-27Bring over the changes to mainbus(4) and simplebus(4) from arm64.Mark Kettenis
2017-04-27Unifdef KADB.Martin Pieuchot
ok deraadt@
2017-04-27Use (32-bit) word-sized access in the a4x bus space routine even if onlyMark Kettenis
a byte or a half-word is needed. Certain implementations of the Synopsis Designware copy-and-paste logic blocks don't respond to transactions that are smaller than a word. Fixes the serial console on boards with a Rockchip RK3288.
2017-04-27Add code to identify the CPUs on arm64 systems. The primary CPU is attachedMark Kettenis
and identified early on. For the secondary CPUs this happens late, such that the drivers we need to spin up CPUs, such as psci(4), will be available. This also fixes some code in simplebus(4) where the return value of OF_getprop() was not properly checked. Heavily based on an earlier diff from drahn@. ok drahn@, jsg@
2017-04-27rename a struct that was denoted as "VMX only" to make it more clearMike Larkin
that it can be used in SVM and VMX. no functional change
2017-04-27use a more descriptive value from the VEI_DIR_xxx enum instead of aMike Larkin
hardcoded number. no functional change
2017-04-27vmm(4): proper save/restore of FPU context during entry/exit.Mike Larkin
tested by reyk, dcoppa, and a few others. ok kettenis@ on the fpu bits ok deraadt@ on the vmm bits
2017-04-26Convert some hardcoded function names in printfs into %s / __func__.Mike Larkin
Some of these pointed out by Michael W. Bombardieri, I went through the file and fixed the rest. No functional change.
2017-04-26Convert some hardcoded function names in printfs into %s / __func__.Mike Larkin
Some of these pointed out by Michael W. Bombardieri, I went through the file and fixed the rest. No functional change.
2017-04-26Fix a typo relating to savefpu alignmentMike Larkin
ok kettenis
2017-04-24Add support for Cortex-A12. Even though ARM rebranded these as Cortex-A17Mark Kettenis
they have a different ID from "real" Cortex-A17 cores. ok phessler@, patrick@
2017-04-24Process fdt before iobus devices. Needed later when interrupt andVisa Hankala
MDIO controller drivers are attached using fdt.
2017-04-24Add an fdt blob for octeon systems whose firmware does not provideVisa Hankala
a device-tree. It will be needed later when more device drivers are attached using fdt. OK kettenis@
2017-04-24Stop dumping registers on "normal" segmentation faults. Do print the contentsMark Kettenis
of the esr_el1 register for unhandled userland exceptions (and continue to dump the registers in that case). Handle breakpoint traps and make sure we call refreshcreds() on userland traps. ok jsg@
2017-04-22Recognize Loongson 3A2000/3B2000 processors.Visa Hankala
2017-04-22Fix an early boot failure on Loongson 3A2000.Visa Hankala
Reported and patch tested by wen heping
2017-04-22Reindent with tabs and add missing braces.Visa Hankala
2017-04-20Get TCB address using the RDHWR instruction instead of __get_tcb().Visa Hankala
This gives fast access to the address on systems that implement the UserLocal register. TCB caching is still used when running in the single-threaded mode in order not to penalize old systems. The kernel counterpart of this change must be in place before using this diff! With guenther@
2017-04-20Make TCB address available to userspace via the UserLocal register.Visa Hankala
This lets programs get the address without a system call on OCTEON II and later. Add UserLocal load emulation for systems that do not implement the RDHWR instruction or the UserLocal register. OK guenther@
2017-04-20Tweak lock inits to make the system runnable with witness(4)Visa Hankala
on amd64 and i386.
2017-04-20Hook up mutex(9) to witness(4).Visa Hankala
2017-04-20Hook up mplock to witness(4) on amd64 and i386.Visa Hankala
2017-04-20Add routines for saving stack traces and printing saved tracesVisa Hankala
on amd64 and i386. With guenther@
2017-04-20Use register names without the % prefix in the global register variableMark Kettenis
declarations since clang doesn't register the %-prefixed ones.
2017-04-16Define EXT_IMPLICIT_NBIT like we do on sparc64 and mips64. Makes vaiousMark Kettenis
long double math stuff (including printf) actually work. While there remove 'struct ieee_ldouble', which isn't defined on other architectures. ok deraadt@
2017-04-16Replace fetch_and_add() with atomic_inc_int_nv() from <sys/atomic.h>Visa Hankala
to make the code more similar to sparc64's. OK mpi@, guenther@, kettenis@
2017-04-16Remove some defines marked #ifdef notyet, which really is #ifdef notever.Mark Kettenis
Reduces the diffs with other architectures.
2017-04-15Build sparc64 kernels with -ffreestanding.Mark Kettenis
2017-04-15The tlb flushes in pmap_set_{l1,l2,l3} use ranges that don't fully make sense.Mark Kettenis
But those tlb flushes shouldn't be necessary anyway, so simply remove them. Simplify the tlb flushing code now that we no longer flush ranges, and revive the branch that doesn't flush a specific ASID for the kernel pmap since its mappings are global. ok patrick@, visa@
2017-04-15Sync bus_dmamap_load_raw() with amd64 for better constraint checking.Visa Hankala
Needed by xhci(4).
2017-04-15No GMX on CN73xx.Visa Hankala
2017-04-14SVM: calculate max ASID value and save for later use. This will be used inMike Larkin
an upcoming diff to handle ASID/VPID reuse/rollover.
2017-04-13A little bit more trivial cleanup.Mark Kettenis
2017-04-13Use the non-interrupt-safe pool allocator for the vp pool to avoid runninngMark Kettenis
out of kva in the kmem_map. Avoids a hang when spawning a lot of processes.
2017-04-13Provide mips64 with kernel-facing TCB_{GET,SET} macros that store itPhilip Guenther
in struct mdproc. With that, all archs have those and the __HAVE_MD_TCB macro can be unifdef'ed as always defined. ok kettenis@ visa@ jsing@
2017-04-12Correct a format stringPhilip Guenther
Problem noted by Michael W. Bombardieri (mb(at)ii.net) ok mlarkin@ deraadt@
2017-04-11Recognize break conditions and enter ddb if ddb.console is set.Mark Kettenis
ok visa@, deraadt@
2017-04-11Revise 'struct fpreg' and dump floating-point register in core dumps. AlsoMark Kettenis
reset the floating-point register state upon exec. ok guenther@
2017-04-10Use __ASSEMBLER__ instead of __LANGUAGE_ASSEMBLY.Visa Hankala
The latter is not defined by clang. OK guenther@, kettenis@
2017-04-08For legacy interrupt use the tag of the topmost bridge to establish theMark Kettenis
interrupt. We already correctly swizzle the pin. ok patrick@
2017-04-08Bring over the changes I made to the armv7 version of this driver such thatMark Kettenis
interrupts are correctly routed to the boot cpu if that isn't the one connected to CPU interface zero on the interrupt controller. ok patrick@
2017-04-08Make network ports work on Shasta.Visa Hankala