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2009-12-07Use a pool to manage pmap pte pages and top level segment table, instead ofMiod Vallat
directly allocating pages from uvm; this will allow us to eventually use a different kernel page size without having to alter the pmap structures layout. No functional change; measured slowdown of 1.6% for 4KB page kernels.
2009-12-07When converting ARCBios memory spaces from ARCBios page size to the kernelMiod Vallat
page size, be sure to pick the strictest interval so as not to incorrectly claim ARCBios reserved data not (kernel) page size aligned as free memory. No functional change since the kernel uses the same page size as ARCBios (at the moment).
2009-12-07Be sure to always check tlbp return values for strictly negative valuesMiod Vallat
to consider the probe as failed; tlb pair #0 does not deserve to be magic in any way.
2009-12-07When netbooting the kernel image from ARCBios, our load address may not beMiod Vallat
honoured, and we may end up loaded at an uncached address (e.g. CKSEG1 on O2). This would cause the kernel to run with instruction cache disabled. Work around this by simply jumping to the address we really want to run at, at the beginning of locore.
2009-12-07When trying to return to ARCBios on a 32 bit ARCBios machine (such as the O2),Miod Vallat
disable interrupts and unconditionnaly use proc0 u area as the stack, so that once ARCBios loses the upper 32 bits of the stack pointer, accessing the stack does not fault (proc0 u area is allocated in CKSEG0 for this reason).
2009-12-04Send `* pwr d' instead of `pwr d' on powerdown, to have L1 broadcast theMiod Vallat
request to other bricks connected to our node.
2009-12-04ahc fits againTheo de Raadt
2009-12-03Stop using the linker script. Something is arranging memory just soTheo de Raadt
resulting in kernels starting up the other cpu's incorrectly on processors with very long pipelines, perhaps some bug instruction prefetch dependency in the mptramp.
2009-12-03RM7000 processors with 64 TLB pairs instead of the usual 48 use an externalMiod Vallat
control bit to enabled use of the extra 16, in order to be able to be used as drop-in R5000 replacement without modifying RM7000-unaware software. Because of this, when a 64 TLB RM7000 processor is detected, check that the upper 16 really will be used before deciding how many TLB the kernel needs to invalidate whe ASID wraps.
2009-12-02no firmware on ramdisks; ok kettenisTheo de Raadt
2009-12-02IPL_IPI priority raised to IPL_IPI > IPL_HIGH for handling TLB shootdown.Takuya ASADA
ok miod@
2009-12-02use kstack for curprocpaddr instead of proc0paddr.Takuya ASADA
ok miod@
2009-12-01Fix the mixer interface for the CE4231 sound card found in Sun machines. Still aEdd Barrett
lot of room for improvement in the driver, but atleast it works now. OK kettenis@, ratchov@
2009-12-01Don't claim to know about nehalem until we can be sureJonathan Gray
the the msr paths are sane. ok deraadt@
2009-12-01The MD ACPI PSS paths are using MSRs they shouldn't beJonathan Gray
so don't try to do EST on machines we don't know the bus_clock on for now. ok deraadt@
2009-11-30Load firmware that is needed for accelerated X on Elite3D boards.Mark Kettenis
The firmware is loaded from /etc/firmware/afb, which will be provided soon.
2009-11-30Add inline function to read %fprs.Mark Kettenis
2009-11-30Crank __LDPGSZ from 4KB to 16KB, in preparation for a kernel page sizeMiod Vallat
increase as well. Binaries compiled before this change will not work once the kernel page size is cranked (in a few weeks), so you might want to update your userland and packages soon.
2009-11-30KNFPaul Irofti
2009-11-30Bump up array size to prevent overflow when probing memoryCan Erkin Acar
on machines reporting > 32 memory regions. ok kettenis@
2009-11-30Use the new Elfxx_Phdr check hook to prevent loading a kernel not compiledMiod Vallat
for the platform we are running on (i.e. trying to boot e.g. bsd.IP32 on an IP27 machine).
2009-11-29disable the isa wdc's because amd64 machines are much more likely toTheo de Raadt
be legacy-free machines built by Dell monkeys who then (it seems) reuse the io address space for something else. Touch it, and the
2009-11-29disable the isa wdc's because amd64 machines are much more likely toTheo de Raadt
be legacy-free machines built by Dell monkeys who then (it seems) reuse the io address space for something else. Touch it, and the machine resets. Great....
2009-11-29At suspend time there is no need for a fancy cr3 dance to decide ifTheo de Raadt
pmap_activate() should be called to force the kthread into the kernel pmap. If it is i386 it is lazy pmap it may not be in the kernel kthread, so it must be called so that pmap_activate can decide. If it is amd64 without lazy pmap, it must not be called. A comment is added to remind us about this in the future in case these assumptions change. ok kettenis
2009-11-29Reload mtrr state on all CPUs after updates. Seems to speed up X on MPMark Kettenis
systems, at least with Intel graphics. ok marco@, deraadt@
2009-11-29Send a powerdown command to L1 on IP35 if powerdown is requested.Miod Vallat
2009-11-28missing #ifdef MULTIPROCESSOR protection around locking code.Miod Vallat
2009-11-27Move MB_LEN_MAX into the machine-independent sys/limits.h header,Philip Guenthe
rather than defining it separately for each architecture. Also set it to 4, to accommodate for future UTF-8 support (rfc3629). Diff by stsp, committing to catch the libc major bump ok kettenis@, guenther@
2009-11-27ci->ci_curprocpaddr must initialized before cpu1 get into cpu_switchto().Takuya ASADA
ok miod@
2009-11-27atomic counter increment for SMP.Takuya ASADA
ok jsing@
2009-11-26Now IPI can interrupt to clock interrupt handler.Takuya ASADA
It prevents deadlock with TLB shootdown and clock interrupt. ok miod@
2009-11-26Reset the wakeup vector to ensure that we don't resume on reboot.Mike Larkin
Temporarily disabled for debugging purposes, but can be turned on if needed. ok deraadt@
2009-11-26do not pull acpi_wakecode.o into RAMDISKSTheo de Raadt
2009-11-26move gcu* to near what it is used byTheo de Raadt
2009-11-26By popular demand and peer pressure, check-in work in progress work to supportMiod Vallat
the Yeelong Lemote mips-based netbook. Kernel bits only for now, needs polishing; most of this work done during h2k9 last month, although the porting effort started earlier this year.
2009-11-26initialize cpu_info correctly.Takuya ASADA
ok miod@
2009-11-26wdc@isa ok deraadtJonathan Gray
2009-11-26By popular demand and peer pressure, check-in work in progress work to supportMiod Vallat
the Yeelong Lemote mips-based netbook. Kernel bits only for now, needs polishing; most of this work done during h2k9 last month, although the porting effort started earlier this year.
2009-11-26knf relative to i386Theo de Raadt
2009-11-26re-init the fpu like on i386Theo de Raadt
2009-11-26Really want isa.h when using #ifdef NISA > 0Theo de Raadt
2009-11-26Add an explicit check for supported models (10, 13, 15) before setting up theNicholas Marriott
Via CPU temperature sensor task, otherwise it is added for model 9 as well which is not supported. ok kevlo
2009-11-26Fix a stack problem on amd64, now the resume functions get called properly.Mike Larkin
Tested mlarkin on thinkpad x60, pirofti on dell d620, and deraadt on thinkpad T61. ok deraadt@, pirofti@
2009-11-25Fix typo.Joel Sing
ok kettenis@
2009-11-25Add ci_randseed.Joel Sing
ok kettenis@
2009-11-25Repair typo in commented-out DRM option, 'sure' oga@Ian Darwin
2009-11-25Unbreak GENERIC-IP27.Joel Sing
2009-11-25By popular demand and peer pressure, check-in work in progress work to supportMiod Vallat
the Yeelong Lemote mips-based netbook. Kernel bits only for now, needs polishing; most of this work done during h2k9 last month, although the porting effort started earlier this year.
2009-11-25By popular demand and peer pressure, check-in work in progress work to supportMiod Vallat
the Yeelong Lemote mips-based netbook. Kernel bits only for now, needs polishing; most of this work done during h2k9 last month, although the porting effort started earlier this year.
2009-11-25IP30 IPI implementation.Takuya ASADA
Also few xheart modification for SMP. ok miod@