Age | Commit message (Collapse) | Author |
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ok mlarkin@
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tested by & ok mlarkin@
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add attributes to it later; as wd33c93 is not a valid device name.
ok miod@
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to avoid possible use-after-free references when swapping ids in threaded
processes. "Do I have the right creds?" checks are always made with the
threads creds.
Inspired by FreeBSD and NetBSD
"right time" deraadt@
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LUNA-88K.
LUNA-88K{,2} has one or two slot(s) that can attach the extension
board designed for PC-9801. This driver provides dedicated mmap(2)
and capability for waiting specified interrupt on that slot so that we
can use the extension board from userland program.
(*)PC-9801 is a Japanese popular personal computer, mainly used in
1980-90's. (see http://en.wikipedia.org/wiki/NEC_PC-9801)
ok miod@, and man pages jmc@
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ok miod@
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No functional change; helps non-released kernels with extra debugging code (-:
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ok mpi@ yuo@
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even comment the lines.
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is currently being covered by the wired TLB entries, flush them, so that,
if the process' pc is still running in a vulnerable page, the WAR will
reapply immediately and fault the next page.
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the usual 1.1 coprocessor mask, instead of using zero and having every
userland process dying with signal 4.
The circumstances under which this call fails are unclear and could be
tied to specific PROM version (I have tried overzealous stack alignment and
other tricks, to no avail). Interestingly enough, the 715/75 system which
hits this problem, only triggers it when booting from disk, and never when
booting from network.
This diff is an ugly bandaid until the problem is better understood. Or maybe
it is not worth investigating, seeing that Linux hardcodes the coprocessor
mask and never issues PDC_COPROC calls; I wonder what HP/UX does.
In my tree for over 18 months; "Looks like a nice hack" deraadt@
715/75 system provided by Sebastiaan Indesteege, thanks!
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interrupt is routed through the ISA PIC, the interrupt is edge-triggered
(despite PCI interrupts being level-triggered).
Attempt to recognize this and correctly setup the PIC ELCR register to `edge'.
This allows ES40 systems (and maybe others, but apparently all the other alpha
systems with on-board M5237 correctly route its interrupt as a PCI interrupt)
to reliably boot multiuser without suffering from USB interrupt storms (this is
especially noticeable when using glass console which, unlike serial console,
does not trigger other interrupts to give other devices a chance to run).
However, this is not enough yet to allow for proper USB device usage; your
mileage may vary.
Tested by bluhm@ and me. Putting it early in the release cycle so that
regressions on other systems, if any, can hopefully get noticed soon enough.
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scsibus. this lets path drivers get matched instead of just sd(4).
ask mpath to maybe swap a path with a disk via mpath.
ok deraadt@
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instead a single function ppc_mem_regions() required by the ppc pmap.
ok kettenis@
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instead a single function ppc_mem_regions() required by the ppc pmap.
ok kettenis@
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ok kettenis@, deraadt@
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This should make bus_dmamap_load(9) and bus_dmamap_unload(9) "mpsafe".
As a bonus this gets rid of a potential memory allocation in the IO path.
ok miod@
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processors, every time a new text page is mapped in a pmap, the L1 I$ is
flushed for the va spanned by this page.
Since we map pages of our binaries upon demand, as they get faulted in, but
uvm_fault() tries to map the few neighbour pages, this can end up in a
bunch of pmap_enter() calls in a row, for executable mappings. If the L1
I$ is small enough, this can cause the whole L1 I$ cache to be flushed
several times.
Change pmap_enter() to postpone these flushes by only registering the
pending flushes, and have pmap_update() perform them. The cpu-specific
cache code can then optimize this to avoid unnecessary operations.
Tested on R4000SC, R4600SC, R5000SC, RM7000, R10000 with 4KB and 16KB
page sizes (coherent and non-coherent designs), and Loongson 2F by mikeb@ and
me. Should not affect anything on Octeon since there is no way to flush a
subset of I$ anyway.
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call bufq_quiesce() after executing the DVACT_QUIESCE handlers.
This should be safe since no disk nor controller drivers have such
handler but it will allow us to detach sd(4) devices attached to a
USB bus.
Another benefit pointed out by kettenis@ is that drivers that need
to read a firmware from the disk should be able to do it at resume
time in a DVACT_WAKEUP handler.
ok kettenis@, deraadt@
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Be a bit cynical about firmware fitting, of course..
ok jmatthew
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struct ucred; struct process then directly links to the ucred
Based on a discussion at c2k10 or so before noting that FreeBSD and
NetBSD did this too.
ok matthew@
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afterwards, for some prom misbehave if the network interface is opened twice;
repairs boot.net operation on at least SS5 PROM v2.21; found the hard way by
sebastia@. Crank boot version; verified not to hurt disk boot.
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ok deraadt@
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supposedly provided by newer PMON firmware (on Loongson 2Gq and Loongson 3A
systems).
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ok dlg@ mpi@ deraadt@
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board revisions < 4 (found on Indigo) and >= 4 (found on Indy and Indigo2).
Paint the cursor as an inverted glyph, instead of exchanging bg and fg colours
(matching the current practice on other frame buffers).
Speed-up overlapping copy operations by attempting to perform them in
larger chunks whenever possible; this speeds up console jump scrolling.
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ok mpi@
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the effects will be.
sgi will follow after i fix some known fallout first.
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as the northbridge, have the per-platform early setup code register functions
providing access to the PCI configuration space, for the wscons code to walk the
PCI space in search of a graphics board.
No functional change yet.
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(such as 2E and 3A systems).
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