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2020-06-16make intr_barrier run sched_barrier on the cpu the interrupt pinned to.David Gwynne
intr_barrier passed NULL to sched_barrier before this, which ends up being the primary cpu. that's been mostly right until this point, but is set to change.
2020-06-16Some simplifications.Mark Kettenis
2020-06-16Add missing dependeny.Mark Kettenis
2020-06-15Check rdrand for success and try up to ten times, as recommended by Intel.Christian Weisgerber
Do the same for rdseed. ok deraadt@
2020-06-15update powerpc64 include paths for 5.7 drmJonathan Gray
ok kettenis@
2020-06-14Implement cpu_rnd_messybits() as a read of the cycle counter register.Christian Weisgerber
ok dlg@ deraadt@
2020-06-14Implement cpu-rnd_messybits() as a read of the cycle counter register.Mark Kettenis
2020-06-14Remove debug code.Mark Kettenis
2020-06-14Enable ahci(4).Mark Kettenis
2020-06-14Provide address space extents. While the firmware does configure the bridgeMark Kettenis
windows it doesn't enable the bus master bit in the command register. This prevents DMA from working. By providing the address space extents ppb(4) will automatically configure the bridge and set the bit.
2020-06-14Get context switching between kernel threads going.Mark Kettenis
Since the stacks for kernel threads are not mapped 1:1 this involves translating virtual addresses into physical addresses when making OPAL calls.
2020-06-14Put a bit more information in the panic message.Mark Kettenis
2020-06-14Parse bootargs.Mark Kettenis
2020-06-14do not need assym.hTheo de Raadt
2020-06-14Add -msoft-float, -mno-altivec and -mno-vsx to the compiler flags.Mark Kettenis
2020-06-14Make soft interrupts work.Mark Kettenis
2020-06-14Minimal >machine/asm.h> to make ffs.S build.Mark Kettenis
2020-06-14crank version numberTheo de Raadt
2020-06-14asm versions of mdrandom() no longer neededTheo de Raadt
2020-06-14rewrite mdrandom() in C. previously this XOR'd against rdrand if available,Theo de Raadt
and alternatively XOR'd against TSC. now always run both sequences, and also support rdseed as a third procedure. ok kettenis naddy
2020-06-14Unstub diskconf().Mark Kettenis
2020-06-13Add support for the XIVE interrupt controller found on POWER9 CPUs.Mark Kettenis
2020-06-13Remove a dead store.Visa Hankala
2020-06-13Load CTF section to enable DDB's "show struct"kn
Other platforms use libsa's ELFNAME(), e.g., elf64_exec() on amd64, already to load the kernel's ELF section ".SUNW_ctf". Adapt ofwboot accordingly to enable ddb(4) on sparc64 as well to utilise CTF information for commands like "show struct". Hints from mpi OK kettenis mpi
2020-06-12Teach powerpc64 ddb to x, w, break, step, trace.gkoehler
Copy and adapt db_memrw.c from amd64, so ddb can read and write kernel memory. It can now insert breakpoints in the kernel text. Change __syncicache() to prevent an infinite loop when len isn't a multiple of cacheline_size. Get breakpoints and single-stepping to work. Single-stepping uses msr bit PSL_SE (single-step trace enable). Adapt db_trace.c db_stack_trace_print() from powerpc 32, but without all its features. For now, powerpc64 trace doesn't print function arguments and doesn't recognize traps. "go for it" kettenis@
2020-06-11Fix small bug in parsing the IORT tables. Mapping entries specify the numberMark Kettenis
of IDs in a range minus one. ok patrick@
2020-06-11Enable simpleamp(4), simpleaudio(4), rkiis(4) and escodec(4).Patrick Wildt
ok kettenis@
2020-06-10Add clock interrupt support, adapted from the randomized dual clockMark Kettenis
implementation from Dale Rahn but relicensed (with his permission) under our standard ISC license.
2020-06-10Allocate MSIs from the range provided by the device tree and bind themMark Kettenis
to a PE.
2020-06-10Another OPAL API that we need.Mark Kettenis
2020-06-10Enable cwfg(4)Patrick Wildt
ok kettenis@
2020-06-10A bit of MSI support code; we need to distinguish between 32-bit and 64-bitMark Kettenis
MSIs on powerpc64.
2020-06-10Add MSI support calls.Mark Kettenis
2020-06-10Add ahci(4), bge(4) and xhci(4); ahci(4) and xhci(4) remain disabled for now.Mark Kettenis
2020-06-10Add opal(4) a driver that interacts with the OPAL frimware and implementsMark Kettenis
RTC functionality.
2020-06-10Add RTC read and write calls.Mark Kettenis
2020-06-09Add a few missing bits.Mark Kettenis
2020-06-09Implement intr_enable(), intr_disable() and intr_restore().Mark Kettenis
2020-06-09Add mtdec().Mark Kettenis
2020-06-09Make FRAME_LEAVE a bit more complete and do things in the same order asMark Kettenis
FreeBSD for now.
2020-06-08Set up 64-bit mmio windows and enable DMA bypass mode.Mark Kettenis
2020-06-08Add bus_dma(9) implementation.Mark Kettenis
2020-06-08Improve pmap_extract(9).Mark Kettenis
2020-06-08Keep track of the maximem physical memory address.Mark Kettenis
2020-06-08More OPAL interfaces.Mark Kettenis
2020-06-08More stubs.Mark Kettenis
2020-06-08use the 64-bit byte-swapping load/store instructions available startingChristian Weisgerber
with POWER7; ok dlg@ kettenis@
2020-06-08update drm to linux 5.7Jonathan Gray
adds kernel support for amdgpu: vega20, raven2, renoir, navi10, navi14 inteldrm: icelake, tigerlake Thanks to the OpenBSD Foundation for sponsoring this work, kettenis@ for helping, patrick@ for helping adapt rockchip drm and many developers for testing.
2020-06-07Skip probing cbus(4/luna88k) and xp(4/luna88k) in RAMDISK kernel, theyKenji Aoyama
are not necessary in install/upgrade process.
2020-06-07Implement delay(9).Mark Kettenis
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