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2008-07-18Add ohci(4) and ehci(4) at cardbus(4).Mark Kettenis
2008-07-18Determine the free address space by looking at the "available" property ofMark Kettenis
the PCI host bridge if we're not running on an UltraBook. Fix allocation of bus number such that it works on machines that have OpenBoot 4.x.
2008-07-18Protect dma operations with splvm instead of splhigh, that's faster thanMiod Vallat
splbio and won't delay clock interrupts.
2008-07-18Make IPL_VM level 5, which is guaranteed to be above bio tty and net, insteadMiod Vallat
of making it dynamic and the smallest value above the former three. Idea from NetBSD.
2008-07-18Add new uvm function called uvm_map_pie() which takes align as aKurt Miller
parameter and returns an aligned random load address for position independent executables to use. This also adds three new vmparam.h defines to specify the maximum address, minimum address and minimum allowed alignment for uvm_map_pie() to use. The PIE address range for i386 was carefully selected to work well within the i386 W^X framework. With much help and feedback from weingart@. okay weingart@, miod@, kettenis@, drahn@
2008-07-16Add a new parameter to pckbc_cnattach(): flags to put in the pckbc bowels.Miod Vallat
For now, only one such flag is defined, PCKBC_CANT_TRANSLATE. It hints pckbc that the device does not behave correctly to the ``set translation'' commands. Set this flag if we are running on a Tadpole Ultrabook machine, which needs it. This makes the built-in keyboard work correctly on this laptop (with the help of the software translation pckbd diff). tested & ok kettenis@
2008-07-16Send unused string literal ``mapme'' to nirvana.Miod Vallat
2008-07-16This file is long unused.Miod Vallat
2008-07-16Implement pckbc_xt_translation() in gsckbc. Thus, we can attach pckbd instead ofMiod Vallat
gsckbd; the former will cause a proper translation page to be selected by the keyboard. Because of this, we no longer depend on the page the keyboard is left in by the PDC (page 2 for all machines but the PrecisionBook, which is in page 3), and there is no longer any need to use separate keyboard maps.
2008-07-16Now that uvm_pglistalloc() does not lose on large memory gaps, do notMiod Vallat
restrict the memory allocation range in _dmamem_alloc().
2008-07-15Add a timecounter based on the $sys_tick register, and use it on machinesMark Kettenis
that have it. Initial diff from art@.
2008-07-15Use -Wa,-Av9b instead of -Wa,-Av9a such that I can use %sys_tick in anMark Kettenis
upcoming change.
2008-07-14Fix struct sysioreg layout after the struct iommureg layout change;Miod Vallat
ok kettenis@
2008-07-14Use uvm_km_valloc_prefer_wait() instead of uvm_km_valloc_wait() in vmapbuf().Miod Vallat
ok art@
2008-07-14Be sure to propagate PSL_O in psw on PCXU* processors to userland processesMiod Vallat
and signal handlers. ok kettenis@
2008-07-14Be sure to propagate PSL_O in psw on PCXU* processors to userland processesMiod Vallat
and signal handlers. ok kettenis@
2008-07-14Zap some dead commons that are no longer used.Artur Grabowski
"Commitski!" miod@
2008-07-12Make the console interrupt driven.Mark Kettenis
2008-07-12Shave off a few instructions from cpu_switchto().Mark Kettenis
2008-07-12Add a temporary hack to attach only the first thread of every core forMark Kettenis
MULTIPROCESSOR kernels. We map 'struct cpuinfo' at the same virtual address on every processor, but since threads on the same core share an MMU this doesn't quite work. With the hack we are at least able to use the other core (and any additional processors).
2008-07-12Add core(4).Mark Kettenis
2008-07-12Perform IOMMU cache flushes on Oberon.Mark Kettenis
2008-07-12Use the proper interrupt target ID on Oberon.Mark Kettenis
2008-07-12Adjust SUN4U_TLB_RESERVED_MASK for updated SUN4U_TLB_PA_MASK.Mark Kettenis
2008-07-12Don't install interrupt handlers for non-exitsing interrupts on CMU-CH.Mark Kettenis
2008-07-12On Fujitsu's SPARC64 CPUs, the data_access_error trap is synchronous, and AFSRMark Kettenis
will be 0. Check SFSR too, before deciding there's no fault.
2008-07-12Add macros to get the appropriate interrupt target ID for non-UPA CPUs andMark Kettenis
use them in cpu_myid().
2008-07-11Fujitsu SPARC64-VI CPU's have two cores that have two threads each. ProvideMark Kettenis
a core(4) device, representing these cores and attach cpu(4) devices to it for each thread.
2008-07-11Don't try to read the "regs" propety; it's pointless.Mark Kettenis
2008-07-11Handle CPUs with a clock speed >= 2 GHz correctly.Mark Kettenis
2008-07-11initialise the state kept between calls to dmamap_load_buffer to 0. thereDavid Gwynne
was an extremely small chance that random stack garbage coudl be used which could corrupt a dmamap. this is the same as the change made to amd64 in src/sys/arch/amd64/amd64/bus_dma.c r1.10. ok miod@ kettenis@
2008-07-10Handle breaks.Mark Kettenis
2008-07-10Detect whether com(4) is the console on the m4k.Mark Kettenis
2008-07-10Add support for Fujitsu SPARC64-VI CPUs.Mark Kettenis
UltraSPARC I/II has a 41-bit physical address space, UltraSPARC III/IV has a 43-bit physical address space. The Fujitsu SPARC64-VI extends this to 46 bits. Adjust the TTE masks to take this into account and adjust some locore code that truncated physical addresses to 41 bits (fixing a potential bug for UltraSPARC III/IV too). While there, fix the locore code for UltraSPARC Architecture 2007 CPUs, which may support up to 56 bits of physical address space.
2008-07-10Add support for getting the time of day on the m4k.Mark Kettenis
2008-07-10Add a function to get the time of day from the prom on the m4k.Mark Kettenis
2008-07-09Simplify the match function a bit by just returning the result fromBrad Smith
pci_matchbyid(). This is the only driver that will match against this hardware so it is not necessary to return a higher priority than what pci_matchbyid() returns. ok mbalmer@
2008-07-08vmt(4) is a kernel level implementation of the vmware tools.David Gwynne
it only provides the hosts machines clock as a timedelta sensor so far. getting it into the tree so people can work on it as suggested by fgsch@
2008-07-07Comment correction, actually -> actualBrad Smith
ok henning@
2008-07-07Match on XMITS (which is a PCI-X Schizo variant found on Sun FireMark Kettenis
E2900/E4900/E6900/E20K/E25K systems). There's a fairly good chance it'll just work.
2008-07-07Extend sbbc(4) to provide a console driver for the v1280.Mark Kettenis
2008-07-07Fix typo in comment.Mark Kettenis
2008-07-07Add an entry to report the bus clock on bernd's atom laptop.Jonathan Gray
Intel don't publish the EST voltage tables, and they don't even publish the MSRs for a shipping processor so we can figure out how to do this in the backwards highest/lowest way cleanly. The mapping might look like the Core * one, but who really knows for sure outside of a few guys at Intel. Other machines with Atom processors and a different bus clock will have to be added one by one until this stupidity changes. Tested by bernd, ok gwk
2008-07-07Add AGP and hostbridge support for the Intel 82945GME chipset.Bernd Ahlers
ok jsg@
2008-07-06Enable ssm(4) and remove hacks that worked around the fact that we didn'tMark Kettenis
have it.
2008-07-06Add ssm(4), a driver for the scalable shared memory device found onMark Kettenis
Serengeti and Starcat systems.
2008-07-06Bump verson number now that the bootloader works on the v1280.Mark Kettenis
2008-07-06Add sbbc(4), a driver for the BootBus controller on Serengeti and StarCatMark Kettenis
systems that provides time of day services and (in the future) console services.
2008-07-06Add missing include such that RAMDISK kernels compile again.Mark Kettenis
2008-07-05Copy OBP breakpoint vector from the PROM trap table into our own trap table.Mark Kettenis
This makes the kernel properly enter the prom upon halt on the v1280.