Age | Commit message (Collapse) | Author |
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This is the kernel part necessary for DRI support in X. Disabled for now
because it still has a few bugs, but now I can work on it in tree. Also
requires the requisite bits in X, which are currently under discussion
on how to deal with them with privsep. ported from a combination of the
free and netbsd implementations.
Known bugs:
1) only the first occurence of X in any session will have dri, after
that something prevents it working.
2) if the machine does not have a dri capable card, the kernel panics.
Something's up in one of the probe functions. I haven't been able to
find it though.
3) radeon cards need to be forced to use PCI mode otherwise they get
into an infinite loop.
This is known to at least kinda work with SiS, radeons in pci mode and
intel cards.
ok deraadt, kinda ok art, a few other people had a quick look.
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ok millert
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a jungle. ok deraadt marco
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directive can select between MI and MD versions of these files. At
the same time, adjust the boot programs to pick exactly what they need,
instead of the 7 or 8 mechanisms previously used.
There will be some fallout from this, but testing it all by myself is a
ridiculously slow process; it will be finished in-tree.
Various developers were very nice and avoided making fun of me when I
was gibbering in the corner..
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Thanks!
ok deraadt
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decide which files must be pulled into the kernel. Also conditionalize
the pulling of those files based on the COMPAT_* options.
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Attaches as 'ral' as it shares the PCI and CardBus frontends with
RT2560 and RT2661 though it is actually a separate driver.
Requires a firmware that can't be redistributed with the base system
due to license restrictions (exact same license as iwn(4) firmware).
The 802.11n capabilities not yet supported (except MIMO).
Great thanks to Sam Fourman Jr for donating hardware.
ok deraadt@
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which pckbd and pms attach. This makes it simpler to add new controllers
pckbd/pms can attach to.
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itself, and thus demands the unconditional inclusion of crypto/arc4.c
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- Move the functionality of choosing a process from cpu_switch into
a much simpler function: cpu_switchto. Instead of having the locore
code walk the run queues, let the MI code choose the process we
want to run and only implement the context switching itself in MD
code.
- Let MD context switching run without worrying about spls or locks.
- Instead of having the idle loop implemented with special contexts
in MD code, implement one idle proc for each cpu. make the idle
loop MI with MD hooks.
- Change the proc lists from the old style vax queues to TAILQs.
- Change the sleep queue from vax queues to TAILQs. This makes
wakeup() go from O(n^2) to O(n)
there will be some MD fallout, but it will be fixed shortly.
There's also a few cleanups to be done after this.
deraadt@, kettenis@ ok
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OK jsg@
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requested by deraadt@
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sr_boot_assembly->readdisklabel->readdoslabel->biowait)
is what happens on late-cold architectures. something else has to be fixed
first before that is permitted, i guess.
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ipx related files (doesn't compile anyway)
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Note: this is a work in progress! this is under active development and
things will change.
prompted and ok deraadt
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adosfs has the issue and in an entirely different way. noone uses this
code so this is hte best way to handle the problem
diff from pedro who went to sleep but we need to move ahead; ok thib
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this type of code is implemented many times already in the kernel, this is
a generic version of all those replicated code bases.
originally from tedu@
ok tedu@ tom@ deraadt@
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calculation until the problem is fixed, okay beck@ art@
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of the existing code
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decomissioned aeon ago. We will not miss it at all.
OK dlg@ henning@ and a lot of cheers by other in the room
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prompted by/ok dlg@ deraadt@
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deraadt@ dlg@.
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grudgingly ok deraadt@
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option. Every architecture implements mutexes now.
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it is split up into a bus independant chunk (dev/ic/sli*) and the attach
glue (dev/pci/sli_pci.c) cos there are sbus varaints of this chip which i
hope to get my hands on one day.
this does nothing except attach to the LP8000 controllers.
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were using some of their routines in the bcw driver, I decided to stop
working on it. To avoid any further license chit chat I plain drop the
driver.
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silicon image 3124/3132/3531 sata chipsets eventually.
so far this is the autoconf glue, an actual match routine for the 3124, and
interrupt establishment code. it is split up between pci and ic cos there
are cardbus variants of these controllers that we can support in the
future.
thanks to jolan@ for the name, it was better liked than my initial
suggestion of siisl(4).
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way, rather than requiring some glue in each machines mainbus probe.
it is still commented out.
based on a discussion with miod@ ok marco@ deraadt@
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implementation of a RAID 1 is included in this but it does not deal with
failures yet. Disabled in GENERIC.
Suggestions from and ok beck@ miod@ krw@ dlg@ deraadt@
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tree. ive lost two large changes today thanks to my own stupidity which
could have been avoided if they were in the tree.
discussed with deraadt@
ok jsg@ grange@ an older version was ok marco@
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(this is in preparation for approaching GBC work)
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