Age | Commit message (Collapse) | Author |
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from kettenis via patrick
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Snapdragon 8cx gen 3 SoC.
ok patrick@
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ok deraadt@ kettenis@
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V1000 SoCs.
ok anton@
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is later on interpreted as a com_softc pointer. This is not a problem in
practice as a com_softc structure is the first member of the
com_acpi_softc structure.
Using the actual types consistently yields a better symmetry in my
opinion between registering the interrupt and the corresponding
interrupt handler.
ok deraadt@ kettenis@
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ok jsg@
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ok jsg@
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Save/restore the pin configuration on suspend/resume for amdgpio(4).
This fixes missing interrupts after resume for trackpads on some
machines, including the ROG Zephyrus 14 and the HP DevOne (and probably
others).
Code based on pchgpio(4).
ok deraadt, kettenis
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tx interrupts.
Special treatment of Server Base System Architecture (SBSA) generic UART
devices is required as presence of the interrupt trigger level register
is not guaranteed. Therefore treat such devices of having a 1-byte FIFO.
ok visa@
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is improper, and some chips are more sensitive to this than others. In an
unhibernate situation, /bsd.booted will 'suspend' the TPM, then jump directly
into unhib /bsd, which 'resumes' it. This is wrong because the lifecycle is
supposed to be more like suspend->BIOS->resume. This is a hack until we figure
out how to fix the lifecycle.
from claudio, ok dv
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doesn't get out of sync with what apm(8) reports if power is plugged or
unplugged when a machine is suspended. Which in turn makes sure the machine
properly goes into a low CPU P-state when requested.
ok deraadt@, florian@
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the revision and ranges from 16 to 32 bytes.
Special treatment of Server Base System Architecture (SBSA) generic UART
devices is required as presence of the interrupt trigger level register
is not guaranteed. Therefore treat such devices of having a 1-byte FIFO.
With help from kettenis@ and ok visa@
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Also mask unhandled interrupts like we do in amdgpio(4).
ok kettenis@, deraadt@
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A bunch of servers work now.
Really close to a 3-line diff...
ok kettenis
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ok deraadt@
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re-creating the original (2 weeks ago) order of last-minute-disk-parking
needs a different approach, hmm.
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than scheduling an acpi thread
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able to react to this suitably.
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with AML parsing outside the acpi thread, the locking-release dance
around wsdisplay_{suspend,resume} can be removed
ok kettenis
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ok deraadt@
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reset the MD state before bailing out. New MD function sleep_abort()
does that.
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Fixes my com0 issues after zzz and ZZZ.
OK kettenis@ miod@
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in sleep_resume(), which seems sensible for other future systems also
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steps, so shuffle the MD steps to reinforce the order.
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accidentally broken with the reorganization of the suspend/resume code that
was committed a few days ago.
ok deraadt@
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ok deraadt@ gnezdo@
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OK kettenis@
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for sharing between i386 and amd64.
ok mlarkin kettenis
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Microsoft decided to break with basic ACPI standards with the Go 3.
In this case, they don't expose the battery in a standard way, so
acpibat(4) needs to look for the special Microsoft hid.
From mlarkin@, ok kettenis@
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ok miod@
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This splits out the MI sequencing, backing it with per-architecture helper
functions. Further steps will be neccesary because ACPI and MD are too
tightly coupled, but soon we'll be able to use this code for more architectures
(which depends on figuring out the lowest-level cpu sleeping method)
ok kettenis
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to calculate the remaining time to be fully charged
ok jca@
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interrupt context), this however means occasional resource shortage will
result in callbacks registration failing, and unknown consequences for
the task-submitting caller.
Changing this to use pools with a low water mark, decreases the odds
of that problem occuring.
ok kettenis
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not permitted. Luckily nothing is using GPE_DIRECT anymore, so this code
can be deleted.
ok kettenis
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So only attempt to attach hardware that has both bits enabled. This fixes
an issue where com(4) would attach for a disabled serial port leading to
misdetection of the hardware variant and a subsequent hang when /etc/rc
runs ttyflags -a.
ok anton@, deraadt@
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we have passed a modified version of the contents in the capabilities
register if we wanted to override what sdhc(4) would otherwise read.
Unfortunately there's a second capabilities register that we did not
yet take into consideration, which is why to disable DDR50 support we
created a quirk flag in the softc. The sdhc(4) ACPI nodes have a way
to mask and set bits in both of the capabilities register, which is a
flexible approach to solving that issue and using that for our sdhc(4)
drivers even improves readability.
ok kettenis@
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wide and some _DSD properties depend on it.
ok kettenis@
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feedback and ok tb@ jmc@ ok ratchov@
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correct property. While there adjust acpi_getpropint() as well to
increase similarity with acpi_getprop().
ok kettenis@
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ok kettenis@
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