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path: root/sys/dev/fdt
AgeCommit message (Expand)Author
2020-11-03Disable HW PHY polling. It's enabled by default.Patrick Wildt
2020-10-12Add support for the i.MX8M AHB clocks. These behave just like all thePatrick Wildt
2020-10-12OCOTP's parent clock is the IPG clock on i.MX8M.Patrick Wildt
2020-10-08Register sxitwi(4) in the I2C framework.Patrick Wildt
2020-09-29Add support for A64 UART resets.Mark Kettenis
2020-09-13Add support for the RK3308 MAC.Jonathan Matthew
2020-09-13Correct the property name used to look up the delays for the phy resetJonathan Matthew
2020-09-08Add RK3308 temperature sensors.Jonathan Matthew
2020-09-08Add RK3328 PWM, also found in the RK3308.Jonathan Matthew
2020-09-06Add RK3308 clocksJonathan Matthew
2020-09-04Add RK3308 pinctrl supportJonathan Matthew
2020-09-04Add RK3308 GRFJonathan Matthew
2020-08-30PLL1(CPU_PLL) stability improvement for Allwinner H3/H2+SASANO Takayoshi
2020-08-24Enable UHS-I support. No SDR104 support though since it doesn't seem to workMark Kettenis
2020-08-22Rework unicast/multicast configuration. Keep note that this only changesPatrick Wildt
2020-08-22Correct oversize rxq initialization in the classifier.Patrick Wildt
2020-08-22IPv4 protocol parser init fixup and a few whitespace fixes.Patrick Wildt
2020-08-22Consistently use sizeof(pe) or sizeof(*pe) for the parser entry struct.Patrick Wildt
2020-08-22Use sizeof(variable) instead of using a macro for the length parameter.Patrick Wildt
2020-08-22Simplify some code by getting rid of an extra variable.Patrick Wildt
2020-08-22More consistent use of the BIT() macro.Patrick Wildt
2020-08-22Simplify check for return code.Patrick Wildt
2020-08-17Remove unnecessary BM cookie defines.Patrick Wildt
2020-08-17Rename gmac interrupt register defines to stay consistent with other gmacPatrick Wildt
2020-08-17Add enum for L2 cast like for L3.Patrick Wildt
2020-08-17Some register define renaming.Patrick Wildt
2020-08-17Remove an unnecessary define.Patrick Wildt
2020-08-17Even more whitespace and header changes.Patrick Wildt
2020-08-17More whitespace and enum cleanup.Patrick Wildt
2020-08-17Plenty of whitespace fixups.Patrick Wildt
2020-08-16Properly implement setting of the signal voltage.Mark Kettenis
2020-08-14Implement tuning and enable HS200 mode. On my ODROID-N2 I see very poorMark Kettenis
2020-07-31Make sure bcmtmon(4) attaches even if it has a "syscon" compatible.Mark Kettenis
2020-07-23Even more whitespace fixup.Patrick Wildt
2020-07-22Init GOP and COMPHY.Patrick Wildt
2020-07-22Pass tid we're looking for to mvpp2_prs_hw_read(), then we can zero thePatrick Wildt
2020-07-22Rework mvpp2_prs_flow_find() to return a tid instead of a whole prsPatrick Wildt
2020-07-22Fix more whitespace issues.Patrick Wildt
2020-07-22Use correct ethertype and IP proto defines.Patrick Wildt
2020-07-22Fix whitespace issue.Patrick Wildt
2020-07-22Use 1U for BIT(x), always define it and use it in four more places.Patrick Wildt
2020-07-17Re-work intr_barrier(9) on arm64 to remove layer violation. So far wePatrick Wildt
2020-07-15Run the sxitemp(4) at IPL_SOFTCLOCK instead of IPL_VM. Prevents "panic:Darren Tucker
2020-07-14Implement pci_intr_establish_cpu() on arm64 and armv7. The function pointerPatrick Wildt
2020-07-14Extend the interrupt API on arm64 and armv7 to be able to pass aroundPatrick Wildt
2020-07-10Change users of IFQ_SET_MAXLEN() and IFQ_IS_EMPTY() to use the "new" API.Patrick Wildt
2020-06-30adjust functions for new const in drm MI code; ok jsgTheo de Raadt
2020-06-26MVPP2_TXQ_SCHED_TOKEN_CNTR_REG() expects the logical queue id.Patrick Wildt
2020-06-26Add RX refill handling. Each mvpp(4) controller has up to 8 BufferPatrick Wildt
2020-06-26Add TX completion handling. I'm not quite sure, but I think that wePatrick Wildt