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Age
Commit message (
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Author
2020-11-03
Disable HW PHY polling. It's enabled by default.
Patrick Wildt
2020-10-12
Add support for the i.MX8M AHB clocks. These behave just like all the
Patrick Wildt
2020-10-12
OCOTP's parent clock is the IPG clock on i.MX8M.
Patrick Wildt
2020-10-08
Register sxitwi(4) in the I2C framework.
Patrick Wildt
2020-09-29
Add support for A64 UART resets.
Mark Kettenis
2020-09-13
Add support for the RK3308 MAC.
Jonathan Matthew
2020-09-13
Correct the property name used to look up the delays for the phy reset
Jonathan Matthew
2020-09-08
Add RK3308 temperature sensors.
Jonathan Matthew
2020-09-08
Add RK3328 PWM, also found in the RK3308.
Jonathan Matthew
2020-09-06
Add RK3308 clocks
Jonathan Matthew
2020-09-04
Add RK3308 pinctrl support
Jonathan Matthew
2020-09-04
Add RK3308 GRF
Jonathan Matthew
2020-08-30
PLL1(CPU_PLL) stability improvement for Allwinner H3/H2+
SASANO Takayoshi
2020-08-24
Enable UHS-I support. No SDR104 support though since it doesn't seem to work
Mark Kettenis
2020-08-22
Rework unicast/multicast configuration. Keep note that this only changes
Patrick Wildt
2020-08-22
Correct oversize rxq initialization in the classifier.
Patrick Wildt
2020-08-22
IPv4 protocol parser init fixup and a few whitespace fixes.
Patrick Wildt
2020-08-22
Consistently use sizeof(pe) or sizeof(*pe) for the parser entry struct.
Patrick Wildt
2020-08-22
Use sizeof(variable) instead of using a macro for the length parameter.
Patrick Wildt
2020-08-22
Simplify some code by getting rid of an extra variable.
Patrick Wildt
2020-08-22
More consistent use of the BIT() macro.
Patrick Wildt
2020-08-22
Simplify check for return code.
Patrick Wildt
2020-08-17
Remove unnecessary BM cookie defines.
Patrick Wildt
2020-08-17
Rename gmac interrupt register defines to stay consistent with other gmac
Patrick Wildt
2020-08-17
Add enum for L2 cast like for L3.
Patrick Wildt
2020-08-17
Some register define renaming.
Patrick Wildt
2020-08-17
Remove an unnecessary define.
Patrick Wildt
2020-08-17
Even more whitespace and header changes.
Patrick Wildt
2020-08-17
More whitespace and enum cleanup.
Patrick Wildt
2020-08-17
Plenty of whitespace fixups.
Patrick Wildt
2020-08-16
Properly implement setting of the signal voltage.
Mark Kettenis
2020-08-14
Implement tuning and enable HS200 mode. On my ODROID-N2 I see very poor
Mark Kettenis
2020-07-31
Make sure bcmtmon(4) attaches even if it has a "syscon" compatible.
Mark Kettenis
2020-07-23
Even more whitespace fixup.
Patrick Wildt
2020-07-22
Init GOP and COMPHY.
Patrick Wildt
2020-07-22
Pass tid we're looking for to mvpp2_prs_hw_read(), then we can zero the
Patrick Wildt
2020-07-22
Rework mvpp2_prs_flow_find() to return a tid instead of a whole prs
Patrick Wildt
2020-07-22
Fix more whitespace issues.
Patrick Wildt
2020-07-22
Use correct ethertype and IP proto defines.
Patrick Wildt
2020-07-22
Fix whitespace issue.
Patrick Wildt
2020-07-22
Use 1U for BIT(x), always define it and use it in four more places.
Patrick Wildt
2020-07-17
Re-work intr_barrier(9) on arm64 to remove layer violation. So far we
Patrick Wildt
2020-07-15
Run the sxitemp(4) at IPL_SOFTCLOCK instead of IPL_VM. Prevents "panic:
Darren Tucker
2020-07-14
Implement pci_intr_establish_cpu() on arm64 and armv7. The function pointer
Patrick Wildt
2020-07-14
Extend the interrupt API on arm64 and armv7 to be able to pass around
Patrick Wildt
2020-07-10
Change users of IFQ_SET_MAXLEN() and IFQ_IS_EMPTY() to use the "new" API.
Patrick Wildt
2020-06-30
adjust functions for new const in drm MI code; ok jsg
Theo de Raadt
2020-06-26
MVPP2_TXQ_SCHED_TOKEN_CNTR_REG() expects the logical queue id.
Patrick Wildt
2020-06-26
Add RX refill handling. Each mvpp(4) controller has up to 8 Buffer
Patrick Wildt
2020-06-26
Add TX completion handling. I'm not quite sure, but I think that we
Patrick Wildt
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