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GPIO driver. This allows us to use the fusbtc(4) interrupt
on the RockPro64.
ok kettenis@
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A Type-C controller has multiple tasks. Even though the orientation
of the plug doesn't matter for the user, it matters for the hardware.
To be able to know how to route the SuperSpeed pins you need to know
which way the plug is connected. Also you need to know if you're a
sink/source or device/host. To get the first connection, you toggle
between the modes until you find a connection. In case you see that
a sink is connected, you can turn on USB Vbus to power the sink.
This driver explicitly does not implement USB's Type-C state machine,
but if we get more and more of these controllers it might be worth
doing. Also there's no support for Power Delivery messages yet.
ok kettenis@
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is no compatible phy it tries to enable the VBus using the
phy-supply property. Makes the USB ports on the RockPro64
work.
ok kettenis@
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This controller does not only support pinmuxing, but also includes
GPIO controller functionality. This is needed to e.g. turn on USB
VBus on the Turris Mox.
ok kettenis@
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ok kettenis@
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ok kettenis@
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drive-strength properties. Needed for various HiSilicon SoCs.
ok patrick@, jsg@
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for the "stub" clocks that handle the CPU clock frequency on the Hi3670.
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ok patrick@
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so clang's rule about "static inline" comes into play.
ok patrick
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ok patrick@
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have changed. The clocks are not split into SRC, PRE_DIV, DIV and
CG anymore. There is only a single index for each clock and we
need to handle them as composite clocks internally.
ok kettenis@
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ok kettenis@
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use only one address and size cells. Also set the assigned clocks
and enable them.
ok kettenis@
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not separate nodes, but instead part of imxgpc(4).
ok kettenis@
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virtio 1.0 supports an arbitrary number of feature bits. However, so far
no more than 64 are used (compared to 32 in virtio 0.9). Adjust data
types to support 64 feature bits.
Later, we may want to use bitmaps and setbit(), ... to support even more
feature bits.
ok mlarkin@
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Make it take an address instead of a PFN.
Pass the virtqueue pointer. In virtio 1.0, more information has to be
configured in the device. Also call virtio_setup_queue() after the
information has been filled in.
ok mlarkin@
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muxes, quietly return if the clock has no gate, but it's a div/mux.
With this clocks that are defined in both gates and divs/muxes can
be enabled.
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from the userland. Also allow changing the brightness levels so that
it can even be turned off to save power and to prevent burn in.
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what is used by more recent Linux kernels.
Partly from SASANO Takayoshi.
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error messages if a card is absent from the slot, but other workarounds
are much more complicated.
From SASANO Takayoshi.
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ethernet controller driver. Handling of descriptors and buffers has
not been great. There was no way to recover from a full tx queue.
This introduces a mechanism akin to dwxe(4) and tsec(4) and fixes
that. On rd we now map mbufs directly. On tx we can do that as
well for newer SoCs. The i.MX6 Q/DL generation still needs a bounce
buffer on tx for proper alignment.
Tested with bluhm on Cubox-i (armv7) and Hummingboard Pulse (arm64)
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allows triggering SPI interrupts by doing memory transactions. This was
already partially implemented in mvicu(4) and is now outsourced into its
own driver since we need better initialization when booting using u-boot.
Also implement new and legacy bindings in mvicu(4), relying on the new
mvgicp(4) driver.
ok kettenis@
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phy to check the media status did not only ack the MII interrupt, but
also all the others. Thus it could happen that the TX completion was
not seen by the interrupt handler, leading to full TX queues. Also,
the fec(4) interrupt handler acked more than it handles, thus possibly
also acking the MII interrupt.
Found with bluhm@ on his new arm64 regression setup.
ok bluhm@
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a flag in the upper byte of the 2-byte-wide receive register is set.
ok kettenis@
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"allwinner,sun6i-a31-rtc" has been removed from h3/h5/r40/a64
ok kettenis@
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only allocated and used for the SPI backend.
From Tobias Nygren
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a NanoHat OLED.
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use MSI using dwpcie(4) instead of the GIC, MSIs are disabled for
that platform until implemented.
ok kettenis@
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use this to assert the reset pins for e.g. the PCIe controller.
ok kettenis@
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use this for setting the PCIe clocks to the correct frequency.
ok kettenis@
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And fix some comments
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it assumes that it always followed an interrupt string, but we don't
print that on fdt. having the bus responsible for the whitespace
means the fdt glue can print a colon to separate the bus info from
checkrev output, while every other glue keeps the comma.
ok deraadt@
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this currently relies on the usbphy code in the ehci fdt glue to
work, but this is a work in progress. there's an extra printf of
fdt in the dmesg to make the ohci checkrev code not look terrible.
ok kettenis@
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claudio@ (i think) hit this a while back, and i've had this diff
in my tree since then. i'm putting it in now since it empirically
solved the problem and im sick of carrying the diff around.
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mainline device tree.
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to the desired frequency as possible when setting the frequency of a clock.
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