| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2019-10-07 | Add moxtet(4), a driver for the Turris Mox modules. For now this | Patrick Wildt | |
| driver only enumerates and shows the connected modules. The next step is to implement GPIO controller functionality to e.g. control the pins to the SFP on the MOX D. ok kettenis@ | |||
| 2019-10-07 | Add mvspi(4), a driver for the SPI controller on the | Patrick Wildt | |
| Armada 3700 SoC. ok kettenis@ | |||
| 2019-10-07 | Add SPI clocks. | Patrick Wildt | |
| ok kettenis@ | |||
| 2019-10-07 | Add amliic(4), a driver for the I2C controller found on Amlogic SoCs. | Mark Kettenis | |
| ok patrick@ | |||
| 2019-10-07 | Restart the send queue (rather than just clearing OACTIVE) when we've | Jonathan Matthew | |
| freed up some space on the tx ring. This fixes stalls seen in tcpbench. ok dlg@ patrick@ kettenis@ | |||
| 2019-10-06 | Add support for i2c clock. | Mark Kettenis | |
| 2019-10-06 | Add support for i2c pins. | Mark Kettenis | |
| 2019-10-04 | Add support for setting the CPU clock frequencies. This enables DVFS. | Mark Kettenis | |
| 2019-09-30 | Add pwmreg(4), a driver that implements a voltage regulator that uses a | Mark Kettenis | |
| PWM controller to set the voltage. ok patrick@ | |||
| 2019-09-30 | Add amlpwm(4), a driver for the PWM controller found on various Amlogic SoCs. | Mark Kettenis | |
| ok patrick@ | |||
| 2019-09-29 | Fix pasto. | Mark Kettenis | |
| 2019-09-29 | Replace dwge(4) with a new driver based on dwxe(4). There are many | Mark Kettenis | |
| similarities between the two and using a common approach helps fixing bugs. The new driver is better integrated with the device tree framework and is faster (mainly because the DMA engine is configured properly now). Tested on all currently supported variants of the hardware. ok jsg@, jmatthew@ | |||
| 2019-09-21 | Register sxits(4) as a thermal sensor with the thermal zone support code. | Mark Kettenis | |
| 2019-09-21 | Register sxitemp(4) as a thermal sensor with the thermal zone support code. | Mark Kettenis | |
| From Krystian Lewandowski. | |||
| 2019-09-21 | Implement setting the CPU clock for Allwinner A10/A20 SoCs. | Mark Kettenis | |
| 2019-09-20 | Add A20 GMAC clocks. | Mark Kettenis | |
| 2019-09-20 | DMA works on the RK3288 as well, so unconditionally enable it. | Mark Kettenis | |
| 2019-09-20 | Start using the generic clock code on RK3288 as well by switching over the | Mark Kettenis | |
| SDMMC clock. | |||
| 2019-09-20 | Add RK3288 GMAC clock. | Mark Kettenis | |
| 2019-09-20 | More RK3328 GMAC clock tweaking. | Mark Kettenis | |
| 2019-09-19 | Add RK3328 GMAC clocks. | Mark Kettenis | |
| 2019-09-16 | Add RK3399 GMAC clock. | Mark Kettenis | |
| 2019-09-12 | Prepare for the emac/gmac "phy" property being renamed to "phy-handle" | Jonathan Gray | |
| in a large number of allwinner device trees in arm-soc/for-next which is expected to be merged into linux 5.4-rc1. ok kettenis@ | |||
| 2019-09-09 | Update the bindings for imxsrc(4), since they changed when they were | Patrick Wildt | |
| upstreamed. ok kettenis@ | |||
| 2019-09-09 | Attach imxsrc(4) early and raise its priority to make sure it beats | Patrick Wildt | |
| syscon(4). ok kettenis@ | |||
| 2019-09-08 | Add Allwinner H6 support. | Mark Kettenis | |
| 2019-09-07 | Retrieve SFP information using the SFP framework. | Patrick Wildt | |
| Feedback from dlg@ ok kettenis@ | |||
| 2019-09-07 | Add sfp(4), a driver that allows talking to SFPs connected over | Patrick Wildt | |
| an I2C bus and provides a method to read its pages over the SFP framework. Feedback from dlg@ ok kettenis@ | |||
| 2019-09-07 | Register mviic(4) in the I2C framework. | Patrick Wildt | |
| ok kettenis@ | |||
| 2019-09-06 | missing ; | Theo de Raadt | |
| found by wilfried meindl ok kettenis | |||
| 2019-09-06 | Add mviic(4), a driver to support the I2C controller on the | Patrick Wildt | |
| Armada 3700 SoC. With feedback from and ok kettenis@ | |||
| 2019-09-06 | Add I2C clock gates. | Patrick Wildt | |
| ok kettenis@ | |||
| 2019-09-06 | zero hash bits early in dwxe_iff() | Jonathan Gray | |
| ok kettenis@ | |||
| 2019-09-05 | Add mvdog(4), a driver to support the watchdog on the Armada 3700 SoC. | Patrick Wildt | |
| At the moment it only supports disabling the watchdog, which lets me continue to work on the Turris Mox. ok kettenis@ | |||
| 2019-09-05 | Add missing RCS Id. | Patrick Wildt | |
| 2019-09-05 | Add Allwinner H6 support. | Mark Kettenis | |
| ok patrick@ | |||
| 2019-09-03 | Add support for getting the frequency of the CPU clocks. | Mark Kettenis | |
| 2019-09-03 | remove unreachable return | Jonathan Gray | |
| ok kettenis@ | |||
| 2019-09-02 | Implement setting the CPU clock for Allwinner A64 SoCs. | Mark Kettenis | |
| From Krystian Lewandowski. | |||
| 2019-09-02 | Implement setting the CPU clock for Allwinner A64 SoCs. | Mark Kettenis | |
| From Krystian Lewandowski. | |||
| 2019-09-02 | A few more missing bits: power regulators, eMMC power sequencing, | Mark Kettenis | |
| MMC DDR52 support, clock gating. | |||
| 2019-09-02 | Two additional pin configurations. | Mark Kettenis | |
| 2019-09-01 | Write to the correct register when setting the output level for a GPIO pin. | Mark Kettenis | |
| 2019-09-01 | Use interrupt handler instead of polling for completion. | Mark Kettenis | |
| 2019-09-01 | Use DMA descriptors if necessary. | Mark Kettenis | |
| 2019-09-01 | Add amlmmc(4), a driver for the SD/MMC controller found on various | Mark Kettenis | |
| Amlogic SoCs. Still work in progress. | |||
| 2019-08-31 | Add code to configure SD/MMC pins. | Mark Kettenis | |
| 2019-08-31 | More SD/MMC clock stuff. | Mark Kettenis | |
| 2019-08-31 | Add SD/MMC clocks. Generalize the clock gating code for this purpose. | Mark Kettenis | |
| 2019-08-30 | Add "amlogic,meson-axg-dwmac" compatible. | Mark Kettenis | |
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