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2021-07-07update drm to linux 5.10.47Jonathan Gray
hardware support changes include inteldrm: better support for tiger lake amdgpu: support for navi12, navi21 "sienna_cichlid", arcturus amdgpu: support for cezanne "green sardine" ryzen 5000 apu Thanks to the OpenBSD Foundation for sponsoring this work, patrick@ for helping adapt rockchip drm, kettenis@ and mpi@ for uvm discussions and various testers.
2021-06-29When configuring the USB3 phy, try the OFW PHY API first, and if there'sPatrick Wildt
no matching device, fall back to xhci(4)'s PHY configuration code. ok kettenis@
2021-06-29Add rktcphy(4), a driver for the Type-C PHY controller found on thePatrick Wildt
Rockchip RK3399. While the PHY allows switching between combinations of USB3 and DisplayPort, this driver enables only USB3 functionality. This allows USB3 devices to show up on machines where previously only USB2 devices showed up. Driver was taken from FreeBSD and adjusted to fit into our code base. ok kettenis@
2021-06-27Create DMA maps with 64-bit capability when appropriate.Visa Hankala
OK kettenis@
2021-06-27Use config register to determine if 64-bit DMA is available.Visa Hankala
Suggested by and OK kettenis@
2021-06-27match on sifive,fu540-c000-gemJonathan Gray
used by the hifive unmatched device tree in mainline linux and u-boot ok visa@
2021-06-26cad: Implement 64-bit DMA modeVisa Hankala
This lets the driver utilize 64-bit DMA on hardware that supports it. Currently, riscv64 does not constrain DMA-reachable memory to the 32-bit range. This caused memory errors with cad(4) on machines that have RAM above 4GB in the physical address space. Prompted by Mickael Torres OK kettenis@
2021-06-25Make sure we translate prefetchable mmio space as well.Mark Kettenis
From Mickael Torres.
2021-06-25While it seems like we can choose any I/O virtual address for peripheralPatrick Wildt
devices, this isn't really the case. It depends on the bus topology of how devices are connected. In the case of PCIe, devices are assigned addresses (in PCI BARs) from the PCI address spaces. Now if we take an address from one of these address spaces for our IOVA, transfers from from a PCI device to that address will terminate inside of the PCI bus. This is because from the PCI buses' point-of-view, the address we chose is part of its address space. To make sure we don't allocate addresses from there, reserve the PCI addresses in the IOVA. Note that smmu(4) currently gives each device its own IOVA. So the PCI addresses will be reserved only in IOVA from PCI devices, and only the addresses concerning the PCI bus it is connected to will be reserved. All other devices behind an smmu(4) will not have any changes to their IOVA. ok kettenis@
2021-06-25Remove an unused struct.Visa Hankala
2021-06-24Add support for the 64-bit prefetchable memory window.Mark Kettenis
ok patrick@
2021-06-23Make sure the bus is idle before starting a transfer.Mark Kettenis
ok deraadt@
2021-06-18Enable 32-bit I/O addressing. This gets rid of the io address conflictMark Kettenis
messages on the HiFive Unmatched. ok patrick@
2021-06-16Add ociic(4) and dapmic(4). The first is a driver for the OpenCores I2CMark Kettenis
controller and the latter is a driver for the Dialog DA9063 PMIC. The dapmic(4) driver currently supports the integrated RTC and also provides support for resetting and powering down an application processor. This functionality is used to support rebooting the SiFive Unmatched board. ok deraadt@
2021-06-14Simplify the way we handle PCI configuration space access. Instead ofMark Kettenis
splitting the configuration space access window in a part for type 0 and a part for type 1 commands, use a single window. The code already flips between type 0 and type 1 so there is no benefit in having this complication. Fixes the PCIe host bridge on the SiFive FU740 SoC. ok drahn@, patrick@
2021-06-14Remove unused prototypes.Mark Kettenis
2021-06-13Match sifive,fu740-c000-gem so that device is detected on Unmatched.Dale Rahn
pointed out by jsg@
2021-06-12Enable dwpcie(4) and add support for the PCIe host bridge found on theMark Kettenis
SiFive FU740 SoC. ok drahn@
2021-06-03Implement multicast support in mvpp(4) to make IPv6 work. With thisPatrick Wildt
change it's also not necessary to remember the old lladdr, since the old one will be purged automatically prior to installing the current set of multicast addresses. Complaint filed by matthieu@
2021-06-02Linux folks introduced "10gbase-r" since it is "more correct" and we'reMark Kettenis
starting to see firmware that uses this instead of the "10gbase-kr" that was used before to describe the PHYs. So recognize both and treat that the same. ok deraadt@, patrick@
2021-05-30Include <sys/mutex.h> to avoid a hidden header dependency.Visa Hankala
OK jsg@ deraadt@
2021-05-28Add cad(4), a driver for Cadence GEM.Visa Hankala
This initial revision targets the Zynq-7000, where the GEM implements single transmit and receive queues with 32-bit DMA addresses. The driver uses receive checksum offload, but transmit checksum offload is disabled because of a hardware quirk. Also, the hardware's receive path is prone to getting stuck if input cannot be handled quickly enough. The driver attempts to recover by restarting the receiver when no input has been seen for a while. OK kettenis@
2021-05-28Schedule timeout a little bit sooner. Doing this once every minute isn'tPatrick Wildt
going to hurt, but might save you if you run the machine badly into swap. Proposed by kettenis@
2021-05-28Once i.MX's watchdog is enabled, it can never be disabled. Some 64-bitPatrick Wildt
i.MX machines with a recent U-Boot come up with the watchdog enabled, so we have to regularly ping it to make sure the watchdog doesn't reset us. The watchdog's timeout can be configured in 0.5s steps to a maximum of 128s. Set it to the maximum, and schedule a timeout which reloads the counter every 120s. This only needs to be done if the watchdog is enabled when we boot up. Tested on Cubox-i (armv7) and MNT Reform (arm64) ok kettenis@
2021-05-28Move imxdog(4) to sys/dev/fdt.Patrick Wildt
ok kettenis@
2021-05-26Add aplspmi(4), a driver for the Apple SPMI controller, and aplpmu(4)Mark Kettenis
a driver for the Apple "sera" SPMI power management unit that contains the RTC on Apple M1 systems. ok patrick@
2021-05-21Add an additional pin configuration.Mark Kettenis
2021-05-19Only advertise MSI support if there is an MSI controller of some sort.Mark Kettenis
ok patrick@
2021-05-18Move the pciecam stanza back into files.arm64 since armv7 has its ownMark Kettenis
pciecam(4) implementation hidden away in arch/armv7/vexpress. Unbreaks armv7 kernel builds.
2021-05-17Move pciecam.c to dev/fdt/.Mark Kettenis
ok deraadt@
2021-05-17Rename some MD structs by giving them an architecture-neutral name inMark Kettenis
preparation for sharing PCIe host bridge drivers between arm64 and riscv64. ok mpi@, mlarkin@, patrick@
2021-05-07Print Synopsys version number, use OF_getpropbool(9) where appropriateMark Kettenis
and handle a few more device properties seen on the beaglev board. ok jsg@
2021-05-07fix bounds tests gpio pin numbering starts at 0Jonathan Gray
ok kettenis@
2021-05-05Match on snps,dw-mshc in dwmmc(4) and use clock-frequency for clkbase ifJonathan Gray
the "ciu" clock is missing as mentioned in the devicetree binding. ok kettenis@
2021-05-03Make sdhc(4) attachment work on Zynq-7000.Visa Hankala
OK kettenis@
2021-04-24The variation in access size requirements and spacing of registers ofMark Kettenis
NS16550 clones is a bit of a mess. There are FDT properties that describe these but these proprties are optional for some variants and the default values depend on the compatible string being used. Most variants that have shown up in the ARM world use 32-bit access and spacing. But true NS16550A implementations of course use 8-bit access and spacing. So look at the compatible strings to set up the appropriate defaults. Makes the "true" NS16550A implemented by QEMU work for RISCV targets. ok jsg@, drahn@
2021-04-24Remove unused function pointers from `todr_handle'.Martin Pieuchot
from miod@
2021-04-24Add cduart(4), a driver for the Cadence UART found on Xilinx Zynq SoCs.Visa Hankala
Tested on Xilinx Zynq-7000. Input and OK kettenis@
2021-04-24Add gfrtc a driver for the real-time clock interface of Google'sJonathan Gray
Goldfish Android virtual hardware platform. Used for the RTC on qemu-system-riscv64 -M virt. feedback and ok kettenis@
2021-04-23enable syscon(4) on riscv64Jonathan Gray
makes reboot and poweroff work with qemu ok kettenis@
2021-04-23Adjust support for "syscon-reboot" and "syscon-poweroff" for the updatedMark Kettenis
bindings in mainline Linux. Necessary to support the QEMY RISCV target. ok jsg@
2021-04-20Match on "amlogic,meson-sm1-mmc" compatible.Mark Kettenis
2021-04-15Implement version 2 of virtio(4) at fdt, as used by Parallels on thePatrick Wildt
Apple M1. With this vio(4) shows up and we can properly install and use OpenBSD as VM. "not afraid of the virtio diff" deraadt@ "okie dokie" jcs@
2021-04-07Add graphaudio(4), a driver to support linking together audio componentsMark Kettenis
based on the audio graph description that uses ports and endpoints in the device tree. ok patrick@
2021-04-07Add support for the fractional dividers for the i2s clocks.Mark Kettenis
Fixes audio on the pinebook pro. ok kn@, patrick@
2021-04-05Set sysclk before using itkn
simpleaudio_set_params() calls set_params() which reads sysclk off the "i2s_clk" property before it sets that very clock's rate with dd_set_sysclk() (in case there's multiplier specified). Hence reverse the order so set_params() can pick up the newly set rate. The rate is still off on the Pinebook Pro, but I came across this when reading the code; this also matches NetBSD's sys/dev/fdt/ausoc.c r1.6 "Set sysclk rate at set_format time, so the link set_format callback can read the new sysclk". OK kettenis patrick
2021-04-05Fix typo in debug message. ok kettenis@Darren Tucker
2021-04-05Revert slow mode change so that we always use it for legacy and high speedPatrick Wildt
timings, and if the device tree tells us to. While the change was done to reduce diff, it introduced a regression on some devices, hence this revert. Reported and tested by dtucker@ Tested by kettenis@ and myself
2021-04-01Clean up nonexistent/unused properties handlingkn
Never used since import and probably just ported over from NetBSD as-is; "design-capacity" does not exist in the device tree binding. "monitor-interval-ms" defaults to 250ms as per binding and could be used in the sensor_task_register() call, but our framework only supports whole seconds and there's no advantage over our current fixed poll interval of 5s. OK patrick
2021-04-01Hardcode meaningful alert level, track apm's battery state betterkn
The current code looks for the nonexistent "cellwise,alert-level" property and falls back to zero as threshold (like the original NetBSD code). It also updates the CONFIG register with that very threshold to let the hardware set a bit and thus alert us when it has been reached. Since our sensor framework is designed to poll every N seconds and this driver does not actually look at whether the hardware alerted, neither using a default threshold of zero nor updating the hardware with it makes sense. Remove the alert level code and simply map >50%, >25% and <=25% of remaining battery life to apm(4)'s "high", "low" and "critical" battery state respectively; this matches exactly what acpibat(4) does and provides more meaningful sensor readings without relying on nonexistent device tree bindings. Feedback OK patrick