Age | Commit message (Collapse) | Author | |
---|---|---|---|
2007-04-07 | Add some more device status related register definitions. | Christopher Pascoe | |
2007-04-07 | Correct offset for global interrupt status register. | Christopher Pascoe | |
2007-04-07 | this diff covers two changes, but theyre very tightly tied together. | David Gwynne | |
implement long sgls by allocating 512 bytes per command, which gives us 7 scatter gather tables to fill in per command. we can now do proper sized io. commands are still polled though, so its very very slow ;) since you cant submit more than 128 bytes using direct command submission, we needed to implement indirect submission too. this almost worked, but i gave the controller to pascoe before i got it working. he did the fixes to my dumb dumb mistakes. thanks pascoe. thascoe. | |||
2007-04-05 | finish resetting the device by sending a soft reset via the post_direct | David Gwynne | |
mechanism, and then read the device signature. | |||
2007-04-05 | control bits in the prb. shuffle things around a bit... | David Gwynne | |
2007-04-05 | start defining the scatter/gather bits and the port request blocks (PRBs). | David Gwynne | |
2007-04-04 | interrupt enable set/clear defns | David Gwynne | |
2007-04-04 | port control clear bits | David Gwynne | |
2007-04-01 | Correct some sili port offsets. | Jonathan Gray | |
ok dlg@ | |||
2007-03-31 | more bits and the %b thing for port set/status | David Gwynne | |
2007-03-31 | Port Control Set register defs | David Gwynne | |
2007-03-31 | initial atascsi glue. | David Gwynne | |
2007-03-30 | define the size and offsets for each ports set of registers | David Gwynne | |
2007-03-26 | bits for the global control register | David Gwynne | |
2007-03-26 | oops, 64bit memory bars. | David Gwynne | |
2007-03-24 | port registers | David Gwynne | |
2007-03-24 | global register definitions | David Gwynne | |
2007-03-22 | read and write funcs for the global register space | David Gwynne | |
2007-03-22 | map the global and port register spaces. | David Gwynne | |
2007-03-22 | import sili(4) so it can be worked on in the tree. this will support the | David Gwynne | |
silicon image 3124/3132/3531 sata chipsets eventually. so far this is the autoconf glue, an actual match routine for the 3124, and interrupt establishment code. it is split up between pci and ic cos there are cardbus variants of these controllers that we can support in the future. thanks to jolan@ for the name, it was better liked than my initial suggestion of siisl(4). |