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least one chip sii3112 or sii314, owned by henning) that spuriously
returns failure. This is only backing out one of the dying cases.
As well, I have found one other case where attempts are made to advance
IO even after obvious failure. I suspect that I should find that issue
next.
discussed with henning, kettenis, and matthew
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It's the last file referencing atapiscsi.h too, so might as well get
rid of the need-flags in files.atapiscsi.
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kernel without the former. Also, eliminate two dead stores in
wdcattach().
ok dlg@
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function, and let attachment code calls this rather than malloc(9).
This prevents re-initialization of the queue in shared queue chipsets.
Also, add wdc_free_queue() as a complementary function.
Earlier version (without wdc_free_queue()) tested by sthen@ and Amit
Kulkarni on various pciide(4) chips.
ok dlg@
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that chip-specific drv_probe routines can assume they've already been
initialized.
Tested by sthen@ on i386, armish, and amd64, with both affected and
non-affected pciide(4) chips.
ok dlg@
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WDC_CAPABILITY_ATA_NOSTREAM, and WDC_CAPABILITY_ATAPI_NOSTREAM).
ok dlg@, jsg@, krw@
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this probably means the controller is dead -- as in, a hot plug eject
event. in that case, mark the driver dead and try harder to return -1
in the interrupt handler.
tested by many
ok dlg, miod did not object
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argument to wdcreset(), to have it skip waiting until active channels see
their BUSY bit clear in the status register.
Use this feature in the resume path, during the first reset operation. The
first reset is supposed to only wake up the controller, and the disks don't
come back until the second reset is issued, therefore waiting for them to
report themselves as ready after the first reset, but before the second, is
moot - and as a matter of fact some controllers, such as the AMD 754 and
clones/offspring (e.g. Geode) keep the BUSY bit asserted after the first
reset.
Last, but not least, make sure wd@ata invokes wd_get_params() again before
returning from the resume code, as we will still be using polled transfers
for a short while.
This causes the Lemote Yeelong to resume within less than one second, instead
of the lousy 30 seconds wait between the two resets; and the wd_get_params()
voodoo prevents it from getting spurious ide interrupts afterwards.
wd_get_params() magic from dlg; rest of the work by yours truly after enough
prodding by dlg@ and pirofti@, among others. ok deraadt@ dlg@
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damage kernel memory very much while doing the job. It is not very
pretty yet, but improving it will need some MI work.
ok mlarkin jsg dlg
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future) will try to dma the command buffer to the disk in some way. Use
dma_alloc() to get ahead of this potential failure path.
ok dlg krw
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changes to the SCSI subsystem ioctl(2) handlers.
ok dlg@; ok and tweaks krw@; no objections jsg@
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more speed to things like SSDs that do UDMA 6.
Tested by many.
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This is needed for the addition of further suspend/resume actions.
Okay deraadt@, marco@.
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anymore but make reading the code harder.
ok sthen@ miod@ krw@
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No functional changes.
ok krw@ miod@
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jsg@ krw@ miod@ ok.
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OK deraadt@ and millert@
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0xff, this will allow to detect some certain microdrives plugged
into soekris.
Patch from Jochen <jochen@penguin-breeder.org> via PR 5340.
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reset function pointer, as this can cause a NULL pointer dereference on
some systems.
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At least one system (Ben Lovett's) had issues with the change.
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SATA drive.
ok grange@
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method to be changed as required.
This will be required for dealing with several chips in pciide.
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ok grange@
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"looks sane" grange@; tested by niall@ krw@ jmc@ jolan@
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to probe for drives in its own way. It's a no-op for now but will be
needed for native sata support.
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wdcvar.h.
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wdc_exec_xfer().
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1) wdc_get_log is at splbio() to prevent interrupt handlers from
updating the log
2) work hard to ensure that wdc_tail and wdc_head are between 0 and
wdc_log_cap, even if wdc_log or wdc_get_log is run concurrently against
itself. With this patch, running concurrent wdc_log's may corrupt the
log, but it should not cause any panics.
3) Make sure the buffer always starts on a record boundary. Otherwise
said, wdc_tail should always be on a record boundary.
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informative. Also convert WDCS_BITS string to caps.
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testing status register and a better comments on probe logic.
Tested on i386, sparc64 and macppc by me, jmc@, matthieu@, sturm@ and
drahn@.
ok costa@
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asserted after BSY is cleared in data read codepath. Solves delays in
probe.
The first version of this diff was done by costa@ a long time ago but
had some issues. This one is a partial sync with NetBSD.
ok costa@
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Spotted by Mr. GCC3.
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Tested on matthieu's U5.
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Tested on matthieu's U5.
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ok deraadt@
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SATA drives really don't like it.
Add a delay between drive reset and issuing IDENTIFY command,
some drives need it (from NetBSD).
This fixes problems with SATA drives reported by
Jonathon Fletcher <jonathon.fletcher@pobox.com>. He also
provided access to the test machine.
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- put the reset protocol itself in the separate function __wdcdo_reset()
so we don't need anymore to keep in sync two reset code paths;
- change the reset protocol to something like FreeBSD and NetBSD do,
this fixes slave ATA drive detect with weird ATAPI master (reported
by fgsch@);
Discussed with costa@.
Tested by me, fgsch@, millert@, canacar@.
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Tom: I did not commit a couple of your changes.
i did not include some punctuation fixes (full stops, etc.)
mnemorable -> mnemonic: i decided memorable was probably better
instrunctions -> instruction: i kept the plural
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