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2016-07-26Fix byteswap errors in rtwn(4) and urtwn(4) introduced by me on June 17.Stefan Sperling
Repairs urtwn(4) on macppc. Problem reported by juanfra@. ok millert@ deraadt@
2016-07-13remove unused function ether_cmp()Theo de Raadt
from tom
2016-06-17Merge a lot of code from urtwn(4) into rtwn(4). Both drivers now share codeStefan Sperling
in the file sys/dev/ic/rtwn.c. This reduces kernel bloat and will make it easier to have both drivers benefit from future enhancements. ok mpi@
2016-06-05Continue preparing a future merge of urtwn(4) and rtwn(4).Stefan Sperling
This mostly copies r88e support code to ic/rtwn.c and moves some functions which are not trivial to merge with USB counterparts back to pci/if_rtwn.c. ok mpi@
2016-05-20check we allocated the cq, not the sq, after trying to allocate the cqDavid Gwynne
found by NONAKA Kimihiro while he was porting nvme to netbsd.
2016-05-10make qla_iocb_seg structs 4 byte aligned and use htolem32 to set it.David Gwynne
shaves ~256 bytes off of qla_put_data_seg on sparc64 ok kettenis@ jmatthew@
2016-05-06Make sure we always update both bits that control the bus width. Also makeMark Kettenis
sure that we reset the bus width (to 1-bit) after powering up the bus. Apparently the register write fails if the bus isn't powered on. Implement the chip callback function and advertise 4-bit bus support. ok stsp@
2016-05-06Round the requested clock frequency down to a support value instead ofMark Kettenis
insisting on an exact match. Add support for a 50 MHz clock. ok stsp@
2016-05-06Fix the DMA transfer code to repect the block size in the sdmmc command.Mark Kettenis
ok stsp@
2016-05-05Add Dual Data Rate support for eMMC at 52MHz.Mark Kettenis
2016-05-04Use BUS_DMA_OVERRUN to cope with the broken DMA engine of the Davicom DM9102Mark Kettenis
found on some Sun sparc64 machines. This fixes the unrecoverable DMA errors people have been seeing ever since dlg@ made changes to the pool code that changes the memory layout.
2016-05-01Add support for changing the bus width to the sdmmc subsystem and the sdhc(4)Mark Kettenis
controller. Use this to switch SD cards to a 4-bit bus if they support it. ok deraadt@, jsg@
2016-04-20If RTL8111E on PC Engines APU is detected, configure NIC LEDs to display link.Stuart Henderson
Normally this would be setup in the vendor-programmed eeprom, but in this case it hasn't been done and the rather unfortunate default results in *only* a normally-off light for network activity, nothing for ethernet link, so it's too easy to mistake the machine for being powered down. hw.vendor/hw.machine idea from naddy@, testing jasper@, ok deraadt@
2016-04-18allocate an array of entries, not pointers for the queuesDavid Gwynne
this solves my memory corruption problem with a samsung sm951 in a particular slot on a dell 2950. hilariously, i had picked values which masked this problem on sparc64. i randomly picked 128 as the number of entries on the queues, and dmamem allocs get rounded up to PAGE_SIZE. on amd64 and sparc64 this meant i was asking for 128 * 8 (sizeof pointer), or 1024 bytes, which got rounded up to 4096 and 8192 on each arch respectively. 128 * 64 (the size of a submission queue entry) is 8192, so it worked fine on sparc64 for that reason, but randomly blows up on amd64. the 2950 above allocated mbufs out of the page after the submission queue, which i ended over overwriting. anyway. let's move on.
2016-04-14shorten the io path slightlyDavid Gwynne
2016-04-14apparently it's spelled NVMe, not NVMEDavid Gwynne
2016-04-14provide a shutdown hook that follows the procedure in the docsDavid Gwynne
2016-04-14implement translation of scsi SYNC CACHE to nvme FLUSHDavid Gwynne
2016-04-14bump openings to 64 to match the number of ccbs.David Gwynne
still a bit magical, but good enough for now.
2016-04-14if io needs more than two prpe slots, overflow into the ccb prplDavid Gwynne
this should be enough to make io reliable
2016-04-14reallocate the ccbs after we figure out how big the sgls can beDavid Gwynne
we run with 2 entries for the nvme controller identify, and then bump it up to cover the maxphys divided by the page size we negotiate.
2016-04-14set the scsi status to SCSI_OKDavid Gwynne
2016-04-14allocate dma memory for ccbs to use as prpe listsDavid Gwynne
prpe is short for Physical Region Page Entry. this is where long lists of dma regions go when they wont fit into a submission queue entry.
2016-04-14dont attach if the min nvme page size is bigger than the cpu page sizeDavid Gwynne
nvme and the host cpu need to agree on the page size because its the implicit size of the elements in the chips scatter gather lists. if the min nvme size is greater than the cpus page size then we cant guarantee that io buffers are contig for nvme pages. nvme 1.1 provides an alternative sgl mechanism, so if this really becomes a problem in the future we can fix it on 1.1 and later devices.
2016-04-14dont complete scsi writes twiceDavid Gwynne
it ends up being a use after free, which disagrees with the midlayer.
2016-04-14WAITOK for the dmamap create for ccbs tooDavid Gwynne
again, only called during autoconf which is a kind of process context.
2016-04-14cut the memory for io buffers up into page sized chunksDavid Gwynne
nvme 1.0 does not use conventional scatter gather lists of address+length pairs. instead, it simply expects a list of page addresses. this should be ok if we only feed it single VA chunks which map directly to only whole physical pages. nvme 1.1 introduced another scather format, but still accepts the 1.0 format too. we'll stick to the 1.0 format so we can support 1.0 devs.
2016-04-14check both the admin and io queue for completions in the interrupt handlerDavid Gwynne
this means we'll notice io completions.
2016-04-14dont put names in arguments.David Gwynne
2016-04-14tabs, not spacesDavid Gwynne
2016-04-13implement handling of scsi reads and writesDavid Gwynne
ive only tested reads, and not very big ones. nvme 1.0 has a very stupid/naive idea about what constitutes a scatter gather list. it assumes io is in whole pages in memory, but i dont know if that is true in our kernel. this could be cleaned up a bit, and it currently runs with a single opening for the whole scsi layer and a bunch of magic values for the size and number of the io queues.
2016-04-13enable interrupts before attaching the scsibusDavid Gwynne
2016-04-13allocate a queue for io commands and tell the chip about it.David Gwynne
this is necessary to run reads and writes against the device.
2016-04-13nvme_q_create() issues the commands to tell the chip about io queuesDavid Gwynne
2016-04-13stub out handling of TEST_UNIT_READY, PREVENT_ALLOW, and START_STOPDavid Gwynne
at the moment this just pretends the commands completed fine.
2016-04-13implement handling of scsi read capacity commandsDavid Gwynne
read cap 16 claims the devices are thin.
2016-04-13implement basic scsi inquiry handlingDavid Gwynne
most values are as per the nvm to scsi mapping guide. this doesnt do vpd at all, so no devids or serial numbers just yet.
2016-04-13provide variants of the sqe struct for q creation and io operationsDavid Gwynne
2016-04-13implement the guts of the scsi probe and free functionDavid Gwynne
probe issues a namespace identify against the "target". if it works it stashes a copy of the info, otherwise it tells the midlayer to avoid it. free gets rid of the stashed info.
2016-04-13implement the namespace identify structureDavid Gwynne
2016-04-13the io command setDavid Gwynne
2016-04-13wire up the scsi midlayer. scsibus should appear after this.David Gwynne
2016-04-13allocate an array of things to hold info about namespacesDavid Gwynne
so far the only useful info is namespace identify info
2016-04-13stash the controller identify and number of namespaces in the softc.David Gwynne
the nn is used to size the scsi bus, and the controller identify is used to build responses for various scsi commands.
2016-04-13make a place for q_id to goDavid Gwynne
2016-04-13provide an scsi_adapter and stub functions for emulation to sit inDavid Gwynne
2016-04-13nvme_sqe_fill will post a copy of an sqe from a callerDavid Gwynne
2016-04-13poll for command completion on the cqe itll be of calling nvme_intrDavid Gwynne
2016-04-13make nvme_poll return the flags from the completion queue entryDavid Gwynne
it's still 0 on success, but is the actual bits rather than a mashup of it
2016-04-13keep track of the queue id in nvme_queue.David Gwynne
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