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AgeCommit message (Expand)Author
2016-10-25mask and unmask the interrupt source in an intx specific intr handler.David Gwynne
2016-10-08Add comments explaining why athn(4) disables multi-rate retries with RTS.Stefan Sperling
2016-10-08Bring receive filter handling closer to the way we do things.Mark Kettenis
2016-10-06Disable RTS for long frames in ral(4) for rt2560 chips.Stefan Sperling
2016-10-02Some HABs reset parts of AHCI_PREG_CMD when AHCI_PREG_SCTL_DET_INITPatrick Wildt
2016-10-02Some HBAs report NCQ capability despite only supporting one commandPatrick Wildt
2016-10-02Given that ahci_port_alloc() grabs one CCB for use during NCQ errorPatrick Wildt
2016-10-02Contrary to e. g. the xHCI specification, the AHCI rev. 1.3 specPatrick Wildt
2016-09-19Make this build again.Mark Kettenis
2016-09-19Remove unused getdev() audio driver functions.Alexandre Ratchov
2016-09-17remove unused arcofi_drain() routineAlexandre Ratchov
2016-09-15all pools have their ipl set via pool_setipl, so fold it into pool_init.David Gwynne
2016-09-14Remove drain(), query_encoding(), mappage() and get_default_params()Alexandre Ratchov
2016-09-04remove some more sparc remnants. ok deraadtTed Unangst
2016-09-04naddy discovered that bha no longer builds because it includes the nowTed Unangst
2016-09-03de-zaurus com.cJonathan Gray
2016-09-02No need to set 'error' to 0 at the beginning of acx_encap(), asTom Cosgrove
2016-09-01remove another straggler hunted down by miodTed Unangst
2016-08-31these drivers should have perished in the same fire as mvme88kTed Unangst
2016-08-31Remove unnecessary 'error' assignmentTom Cosgrove
2016-08-23Convert %q to %ll in format stringsPhilip Guenther
2016-08-17Add support for RT5390 and RT5392 chipsets to the ral(4) driver.Stefan Sperling
2016-08-17Move to iopool. No voluntary testers after several years of requests so nowKenneth R Westerback
2016-08-17Move to iopool. No voluntary testers after several years of requests so nowKenneth R Westerback
2016-08-17Make error handling (esp. DATA_UNDERRUN) clearer and avoid losing residKenneth R Westerback
2016-08-16Only probe the UART type if sc_uarttype is set to COM_UART_UNKNOWN.Mark Kettenis
2016-08-15For some reason the RTL8211E PHY on the Banana Pi responds to both address 0Mark Kettenis
2016-08-14change some types in bio from u_quad_t to uint64_t, and fix casts inDavid Gwynne
2016-08-14replace u_quad_t with uint64_t.David Gwynne
2016-08-13Add the core of the code for dwge(4), a driver for the Synopsis DesignwareMark Kettenis
2016-08-10armish handled some early-gen arm machines, which required tons ofTheo de Raadt
2016-07-26Fix byteswap errors in rtwn(4) and urtwn(4) introduced by me on June 17.Stefan Sperling
2016-07-13remove unused function ether_cmp()Theo de Raadt
2016-06-17Merge a lot of code from urtwn(4) into rtwn(4). Both drivers now share codeStefan Sperling
2016-06-05Continue preparing a future merge of urtwn(4) and rtwn(4).Stefan Sperling
2016-05-20check we allocated the cq, not the sq, after trying to allocate the cqDavid Gwynne
2016-05-10make qla_iocb_seg structs 4 byte aligned and use htolem32 to set it.David Gwynne
2016-05-06Make sure we always update both bits that control the bus width. Also makeMark Kettenis
2016-05-06Round the requested clock frequency down to a support value instead ofMark Kettenis
2016-05-06Fix the DMA transfer code to repect the block size in the sdmmc command.Mark Kettenis
2016-05-05Add Dual Data Rate support for eMMC at 52MHz.Mark Kettenis
2016-05-04Use BUS_DMA_OVERRUN to cope with the broken DMA engine of the Davicom DM9102Mark Kettenis
2016-05-01Add support for changing the bus width to the sdmmc subsystem and the sdhc(4)Mark Kettenis
2016-04-20If RTL8111E on PC Engines APU is detected, configure NIC LEDs to display link.Stuart Henderson
2016-04-18allocate an array of entries, not pointers for the queuesDavid Gwynne
2016-04-14shorten the io path slightlyDavid Gwynne
2016-04-14apparently it's spelled NVMe, not NVMEDavid Gwynne
2016-04-14provide a shutdown hook that follows the procedure in the docsDavid Gwynne
2016-04-14implement translation of scsi SYNC CACHE to nvme FLUSHDavid Gwynne
2016-04-14bump openings to 64 to match the number of ccbs.David Gwynne