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AgeCommit message (Collapse)Author
2014-09-14remove uneeded proc.h includesJonathan Gray
ok mpi@ kspillner@
2014-05-06Add support for the Broadcom PHY found on the Octeon-based DSR-500.Paul Irofti
This is an MI driver currently targeting only the BCM53115 model, but other Broadcom devices (specially from the 53XX family) can make use of it as well. The driver currently accounts just for the CPU port. The switch is left in dumb-mode. Further advanced switch control is in the works. Parts of this was inspired by looking at the b53 driver from the OpenWrt project. Thanks! Okay miod@
2014-05-06Regen after Broadcom 53115 addition.Paul Irofti
2014-05-06Add an entry for the Broadcom 53115 model found on the DSR-500.Paul Irofti
Okay miod@
2014-02-01Split bge(4)'s feature flags into bge_flags and bge_phy_flags.Brad Smith
ok naddy@
2014-01-21Sync in the PHY Specific Control and Status register bits.Brad Smith
ok mikeb@
2013-12-30Add support for newer integrated Realtek PHY.Brad Smith
Tested with 8168G controllers.
2013-12-30Have rgephy(4) always use RL_GMEDIASTAT to retrieve the link/media statusBrad Smith
when attached to re(4), as was done before rev 1.25 which was intended to fix rgephy(4) with external PHY with MACs other than re(4). This is to fix operation with some integrated PHY on re(4) where the PHY Specific Status register does not work properly and the link cannot be established. From FreeBSD and matches what the Linux driver does. Tested on a number of newer re(4) with PHYs rev 2, 4 and 5 and newer integrated PHY with the 8168G controllers.
2013-12-28Always call PHY_RESET upon attaching eephy(4) so as to do PHY initialization,Brad Smith
to match behavior before rev 1.52. ok deraadt@
2013-12-28mii drivers no longer need activate functions. Repair of the PHYTheo de Raadt
configuration setting is done at resume time because all networks drivers which were previously up, do an IFF_UP operation which hits PHY_RESET. This was in snapshots for about 2 weeks.
2013-12-28Move the fairly heavy eephy_init sequence [which was only done atTheo de Raadt
attach() and activate() time] into the eephy_reset() routine. This means that a bit more work gets done at PHY_RESET time, but it means also means it gets done in all scenarios. Why? For the next commit... This was in snapshots for about 2 weeks.
2013-12-14regenBrad Smith
2013-12-14new Realtek PHY.Brad Smith
2013-12-08remove case that does nothingTheo de Raadt
2013-06-25Remove unsigned comparison < 0.Brad Smith
Pointed out by LLVM. ok mikeb@
2013-06-15Add support for RTL8101E 10/100 PHY.Mark Kettenis
ok miod@, mikeb@
2013-06-15regenMark Kettenis
2013-06-15Add RTL8101E 10/100 PHY.Mark Kettenis
ok miod@, mikeb@
2013-05-28Fix a common issue across different PHY drivers to reset theMike Belopuhov
autonegotiation timer when PHY gets the link so that if we restart the timer the mii_ticks value would be sane. Lifted originally from FreeBSD, tested by a few on re(4) and bge(4), ok kettenis
2013-03-17Split out bge / bnx reset code into a separate set of functions.Brad Smith
ok sthen@
2013-03-14- Fix passing down MAC feature flags; which fixes flow control support.Brad Smith
- Bring in a workaround for the IP1001 PHY which causes the downshift support to not function properly. From FreeBSD ok sthen@
2013-01-13Add support for reporting flow control status for 5708S/5709S fibre PHY.Brad Smith
ok dlg@
2013-01-10apparently broadcom finally made a series of phys that done need a bunchDavid Gwynne
of workarounds in the 5718 family and up. we dont attach bge to those chips yet, so this cant break anything that isnt already broken. from freebsd.
2013-01-10regenDavid Gwynne
2013-01-10fix model ids for Broadcom BCM5720C and BCM5717C phys.David Gwynne
tested on real 5720 hardware.
2013-01-10when checking if a particular phy has a particular model number,David Gwynne
make sure we check the oui as well. broadcom has 4 or 5 ouis with overlapping model numbers, so they should be scoped when you look them up. tested on at least: bge0 at pci3 dev 4 function 0 "Broadcom BCM5714" rev 0xa3, BCM5715 A3 (0x9003): ivec 0x795, address 00:14:4f:a9:34:90 brgphy0 at bge0 phy 1: BCM5714 10/100/1000baseT/SX PHY, rev. 0 bnx0 at pci7 dev 0 function 0 "Broadcom BCM5709" rev 0x20: apic 0 int 6 bnx0: address 1c:c1:de:e4:5e:b0 brgphy0 at bnx0 phy 1: BCM5709 10/100/1000baseT PHY, rev. 8 bge0 at pci0 dev 5 function 0 "Broadcom BCM5702X" rev 0x02, BCM5702/5703 A2 (0x1002): eb164 irq 2, address 00:10:18:00:98:e9 brgphy0 at bge0 phy 1: BCM5703 10/100/1000baseT PHY, rev. 2 bge0 at pci2 dev 0 function 0 "Broadcom BCM5761" rev 0x10, BCM5761 A1 (0x5761100): apic 2 int 18, address 00:10:18:4b:23:b4 brgphy0 at bge0 phy 1: BCM5761 10/100/1000baseT PHY, rev. 0 some tests by and ok mikeb@ and naddy@
2013-01-09comments are lies. brgphy definitely supports more thant the BCR5400.David Gwynne
ok deraadt@ sthen@
2012-10-22- Provide flow control statusBrad Smith
- Use ANAR_PAUSE_TOWARDS define - Only advertise flow control if the MAC sets MIIF_DOPAUSE ok jsg@
2012-10-22Provide flow control status.Brad Smith
ok jsg@
2012-08-09Add support for BCM5717/19/20C PHYs. From Brad.Mark Kettenis
2012-08-09regenMark Kettenis
2012-08-09Add BCM5717/19/20C PHYs. From Brad.Mark Kettenis
2012-07-05Correct the jumbo setup code within brgphy(4). The code had a mistakeStuart Henderson
and was actually disabling the jumbo settings for the PHY. From Brad.
2011-12-19add BCM57765, same diff jsg@ ok kettenis@Stuart Henderson
- vendor id is listed in Broadcom docs so kettenis suggests removing xx however it's not listed in IEEE OUI list yet, this can be done later following bikeshedding ;)
2011-12-19syncStuart Henderson
2011-12-19add BCM57765 ID, same diff jsg@ ok kettenis@Stuart Henderson
2011-11-19Add a comment explaining the weired nature of the mlphy.Claudio Jeker
From Loganaden Velvindron
2011-07-03Remove config_activate() and DVACT_ACTIVATE. PCMCIA's the only thingMatthew Dempsky
that's ever used it, and it's long since been changed to use DVACT_{QUIESCE,SUSPEND,RESUME} instead. ok deraadt@, dlg@; miod@ also agreed with this idea when I brought it up a few weeks ago
2011-06-17Explicitly clear 1000baseT control register for F1 PHY used inKevin Lo
AR8132 FastEthernet controller. The PHY has no ability to establish a gigabit link. Previously only link parters which support down-shifting was able to establish link. This change should fix a long standing link establishment issue of AR8132. From Brad via FreeBSD Tested by krw@, edd@, Abel Abraham Camarillo Ojeda, Gabriel Linder
2011-04-07Do not use NULL in integer comparisons. No functional change.Miod Vallat
ok matthew@ tedu@, also eyeballed by at least krw@ oga@ kettenis@ jsg@
2011-03-28Add mlphy(4) a driver for the MicroLinear 6692 Ethernet PHYs.Claudio Jeker
The PHY is only 100Mbps capable and needs a copanion chip for 10Mbps mode. Only a few tl(4) seem to ship with it. Ported and tested by Loganaden Velvindron OK sthen@
2011-01-21syncKevin Lo
2011-01-21Add Atheros F1 and F2 PHYs from FreeBSDKevin Lo
ok jsg@
2011-01-15syncKevin Lo
2011-01-15Add drivers for the RDC R6040 Ethernet chipsetKevin Lo
and RDC R6040 Ethernet PHY. Written by Pyun YongHyeon for FreeBSD then ported to OpenBSD by me. Thanks once again to DMP for supplying hardware which made this possible. ok deraadt@
2010-11-23regenKevin Lo
2010-11-23Recognize the Marvell PHYG65G Gig PHY; tested by Frans HaarmanKevin Lo
From FreeBSD ok deraadt@
2010-07-23Manuel Bouyer rescinded clauses 3 and 4 of his license text.Jonathan Gray
2010-07-10whitespace cleanup from Brad, no change with diff -wStuart Henderson
2010-05-24Support fibre PHY on BCM5709S. From FreeBSD via Brad.Stuart Henderson
Tested by Brad on: BCM5706, BCM5708C Tested by me on: BCM5716 (BCM5709 PHY)
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