| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2013-04-02 | Set the IFF_ALLMULTI flag as appropriate. | Brad Smith | |
| ok dlg@ | |||
| 2011-02-15 | Copy pasto in comment. Fix by brad@ OK dlg@ | Claudio Jeker | |
| 2010-05-19 | BUS_DMA_ZERO instead of alloc, map, bzero. | Owain Ainsworth | |
| ok krw@ | |||
| 2009-06-02 | replace custom macro sizeofa() with nitems() | Reyk Floeter | |
| 2008-11-28 | Eliminate the redundant bits of code for MTU and multicast handling | Brad Smith | |
| from the individual drivers now that ether_ioctl() handles this. Shrinks the i386 kernels by.. RAMDISK - 2176 bytes RAMDISKB - 1504 bytes RAMDISKC - 736 bytes Tested by naddy@/okan@/sthen@/brad@/todd@/jmc@ and lots of users. Build tested on almost all archs by todd@/brad@ ok naddy@ | |||
| 2008-11-23 | sizeofa -> nitems | David Gwynne | |
| 2008-10-29 | dlg says "well, that is embarassing" | Theo de Raadt | |
| 2008-10-02 | First step towards cleaning up the Ethernet driver ioctl handling. | Brad Smith | |
| Move calling ether_ioctl() from the top of the ioctl function, which at the moment does absolutely nothing, to the default switch case. Thus allowing drivers to define their own ioctl handlers and then falling back on ether_ioctl(). The only functional change this results in at the moment is having all Ethernet drivers returning the proper errno of ENOTTY instead of EINVAL/ENXIO when encountering unknown ioctl's. Shrinks the i386 kernels by.. RAMDISK - 1024 bytes RAMDISKB - 1120 bytes RAMDISKC - 832 bytes Tested by martin@/jsing@/todd@/brad@ Build tested on almost all archs by todd@/brad@ ok jsing@ | |||
| 2008-09-10 | Convert timeout_add() calls using multiples of hz to timeout_add_sec() | Bret Lambert | |
| Really just the low-hanging fruit of (hopefully) forthcoming timeout conversions. ok art@, krw@ | |||
| 2008-05-05 | Correct defines for NXE_DB_PEGID_RX|TX. OK dlg@ | Claudio Jeker | |
| 2007-10-15 | enable ADDMULTI and DELMULTI in the ioctl handler now that the tht | David Gwynne | |
| it is plugged into can deal with ipv6. i dont have to be careful about what i put on the wire anymore. | |||
| 2007-10-01 | More easy bzero() -> M_ZERO. Use 'p = malloc(sizeof(*p) ...' where | Kenneth R Westerback | |
| obvious. | |||
| 2007-08-27 | start implementing the rx code. this puts pkts and descriptors onto the | David Gwynne | |
| rx ring. | |||
| 2007-08-24 | enable interrupts when the interface comes up. | David Gwynne | |
| i seem to be crashing the rx unit though which is responsible for generating the interrupts. i havent got any yet. | |||
| 2007-08-24 | this is what the interrupt handler will look like. there'll be some added | David Gwynne | |
| lines in here later that call the tx and rx completions. | |||
| 2007-08-24 | the chip has three rx rings, one for normal packets, one for jumbos, and | David Gwynne | |
| one for lro. the manual says that they all have to have descriptors in them for correct operation. i dont care about jumbos and lro at this point so im going to point the descriptors in those rings at a dummy 64k buffer. this diff adds the allocation of that buffer. | |||
| 2007-08-24 | the ring sizes are reprresented by 32 bit fields in the context descirptor, | David Gwynne | |
| so use htole32 to get a value for them, not htole64. | |||
| 2007-08-23 | implement the completion half of the tx path. the driver keeps track of | David Gwynne | |
| mbufs we've put on the hardware with the nxe_pkt struct. this struct contains a unique id for each pkt which is used the hardwares tx descriptor so we could identify which pkts its finished transmitting. turns out the hardware doesnt return ids though, it tells us which slots in the tx ring its up to. so now i stash the slot a pkt went into in the pkt_id field. | |||
| 2007-08-23 | configure the NIU to rx packets that will fit into the mbufs we will | David Gwynne | |
| allocate for it, rather than the default of 1600. | |||
| 2007-08-23 | wrap writes to the doorbell register. | David Gwynne | |
| 2007-08-23 | the first read or write in the crb space after you switch the windows | David Gwynne | |
| tends to be junk, except in the pci regs for some reason. read the crb window register back after setting it to force the junk to go away. this fixes some really weird issues i had. | |||
| 2007-08-23 | program the niu with the mac address in the right order. | David Gwynne | |
| 2007-08-23 | tweak the register macros a bit. add macros for the NIUs port registers | David Gwynne | |
| which are useful to see whats happening on the wire. | |||
| 2007-08-15 | oops, forgot the print the intr string on attach | David Gwynne | |
| 2007-08-15 | hook the interrupt up | David Gwynne | |
| 2007-08-15 | implement nxe_start. this is enough to put packets on the wire. the sgl | David Gwynne | |
| layout of this chip is extremely weird. there's only 4 sg entries in each tx descriptor, but theyre out of order. you can use multiple tx descriptors to tx more than 4 segments, but instead of letting you use all 64bytes that a tx descriptor uses you just use the same 4 sg entries, and up to 8 descs. | |||
| 2007-08-15 | program the mac control thing according the the multicast or promisc | David Gwynne | |
| settings that we ask for. set these flags when the interface is brought up. | |||
| 2007-08-15 | program the lladdr when the chip is brought up. | David Gwynne | |
| 2007-08-15 | sync all the bits for use by the hardware, and then point the chip at them. | David Gwynne | |
| the firmware is now ready to send and recv packets. | |||
| 2007-08-15 | when the interface is brought up allocate all the things that are needed | David Gwynne | |
| for the chip to work with, eg, the context region, the cmd consumer, the cmd/tx ring, the status ring, and the 3 rx rings. free it all when we bring the chip down. | |||
| 2007-08-15 | allocate pkt lists when the interface is brought up. | David Gwynne | |
| make nxe_up return void and report its failure by not setting the RUNNING flag like every other nic ive read. | |||
| 2007-08-15 | here are the tx, rx, and status (rx completion) descriptors used in the io | David Gwynne | |
| paths. | |||
| 2007-08-15 | move the firmware to the right state before we start allocating everything | David Gwynne | |
| for it. | |||
| 2007-08-15 | lock accesses to the ioctl handler. | David Gwynne | |
| 2007-08-15 | this code definitely uses queue.h | David Gwynne | |
| 2007-08-15 | tell the ioctl handler to call nxe_up/down/iff at the right times. they | David Gwynne | |
| are just stubs at the moment though. | |||
| 2007-08-15 | code to allocate, free, sync, and iterate over rings. this is based loosely | David Gwynne | |
| on the fifos used in tht. very loosely. tht fifos were set up to take small writes of varying length and read or write them into the dmaable memory. nxe has fixed sized descriptors in each ring, so this ring handling is set up to just give pointers to the memory to be filled in directly. the iterator just pushes this pointer around the ring. | |||
| 2007-08-15 | steal pkt handling from tht. this lets us keep track of mbufs when theyre | David Gwynne | |
| on the hardware. it stashes ids and dma bits. | |||
| 2007-08-15 | implement link state monitoring. you have to poll the firmware to see the | David Gwynne | |
| state of the link. since im doing this already for the temp sensor i merged the polling for both and do them at the same time. i poll every 5 seconds now instead of every 60. i can now tell if the cable between the nxe and tht has fallen out. white space fixes while im here. | |||
| 2007-08-15 | hook up the ether and ifmedia layers. you can see nxe in ifconfig output | David Gwynne | |
| now. just the lladdr though, i havent filled in enough of the ioctl handler for more yet. | |||
| 2007-08-15 | hook a kernel sensor up to the temp register on the chip. poll out of a | David Gwynne | |
| timeout since reading registers doesnt need a process context. | |||
| 2007-08-15 | start the init of the firmware. it can take a long time, so we start it in | David Gwynne | |
| attach and make sure its finished at mountroot time. | |||
| 2007-08-15 | pull my wrapper around single segment dma allocations in. its got to be at | David Gwynne | |
| least half a dozen drivers now that use this. | |||
| 2007-08-15 | white space fixes | David Gwynne | |
| 2007-08-15 | define the rest of the registers i know about: the interrupt registers, | David Gwynne | |
| init, xg config, ring and context addresses, temp sensor, firmware states. | |||
| 2007-08-15 | fetch the user info off the board. the lladdr and firmware version are | David Gwynne | |
| stored on it. display the fw and lladdr in attach. | |||
| 2007-08-15 | we're a nic, so we need the arpcom and ifmedia structs in our softc | David Gwynne | |
| 2007-08-15 | read the board information off the flash. check it, and stash what type of | David Gwynne | |
| board they say we are. | |||
| 2007-08-15 | provide a map of the board type the flash memory will tell us we are to the | David Gwynne | |
| type of interface it provides. drivers need to deal with 10Gb (XGB) and gigabit (GBE) differently. | |||
| 2007-08-15 | code to unmap the register windows if something in attach goes horribly | David Gwynne | |
| wrong. | |||
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