| Age | Commit message (Expand) | Author |
|---|
| 2007-05-28 | use memcpy when copying to/from the fifos, apparently gcc can do a better | David Gwynne |
| 2007-05-26 | chop ETHER_ALIGN off the size of the packet we tell the hw we can do | David Gwynne |
| 2007-05-26 | ETHER_ALIGN rx mbuf so that it works on strict alignment archs. OK dlg@ | Claudio Jeker |
| 2007-05-26 | correctly byteswap the mac address when moving it on and off teh card | David Gwynne |
| 2007-05-17 | copy the lladdr from the arpcom struct onto the hardware when the interface | David Gwynne |
| 2007-05-17 | support changing the mtu up to the maximum frame size it currently | David Gwynne |
| 2007-05-16 | add support for multicast addresses. this adds the add/del multi handlers | David Gwynne |
| 2007-05-08 | make a start at dealing with interface flags. this toggles the hardware | David Gwynne |
| 2007-05-08 | add the multicast filter registers | David Gwynne |
| 2007-05-08 | write the mac back to the chip when we bring it up. | David Gwynne |
| 2007-05-06 | point the macros for the interrupt coalescing registers at the right | David Gwynne |
| 2007-05-06 | typo | David Gwynne |
| 2007-05-04 | the hardware does checksumming on rx as well. mark the mbufs with what the | David Gwynne |
| 2007-05-04 | advertise tx checksumming to the network stack, and tell the hardware to | David Gwynne |
| 2007-05-04 | increase the number of tx and rx descriptors from 64 to 128 each | David Gwynne |
| 2007-05-04 | call the right function to fill the rxf fifo after rxd | David Gwynne |
| 2007-05-04 | disable debugging output | David Gwynne |
| 2007-05-04 | put more rx descriptors back on the chip straight after we've taken some | David Gwynne |
| 2007-05-04 | wrap the wptr round when we hit the end of the fifo. | David Gwynne |
| 2007-04-30 | fix dmesg; ok dlg | Theo de Raadt |
| 2007-04-29 | missing arguments in a couple of printfs. | David Gwynne |
| 2007-04-29 | Nadav Shemer of Tehuti Networks is magical. | David Gwynne |
| 2007-04-29 | clocks and pll register bits | David Gwynne |
| 2007-04-29 | we dont want to completely fill fifos, so leave a gap when we calculate | David Gwynne |
| 2007-04-29 | when we post a fifo we're giving the dma mem back to the hardware, so we | David Gwynne |
| 2007-04-29 | when completing a tx pkt, put it back on the tx free list, not the rx one. | David Gwynne |
| 2007-04-27 | Correct typo in comment, no code changes | Chad Loder |
| 2007-04-27 | Fix copy/paste-o in offset of TDINTCM register jointly spotted by dlg and | Chad Loder |
| 2007-04-27 | my txt fifo write bug is extremely strange. i need a delay before the | David Gwynne |
| 2007-04-25 | hook the rx path up. | David Gwynne |
| 2007-04-25 | add some dprintfs to the fifo handlers. | David Gwynne |
| 2007-04-25 | when populating the rxf fifo, actually sync the rxf fifo at the start and | David Gwynne |
| 2007-04-25 | we only have to mask interrupts once when we bring the interface down | David Gwynne |
| 2007-04-25 | i got a reg init wrong, still no tx completion though. | David Gwynne |
| 2007-04-25 | enable tx completion interrupts and provide handling for them. | David Gwynne |
| 2007-04-25 | fix a dprintf in the debug path | David Gwynne |
| 2007-04-25 | more register init in tht_up | David Gwynne |
| 2007-04-25 | put a two second timeout on the chip init after the firmware is loaded | David Gwynne |
| 2007-04-25 | shift some bits like the spec says i should. | David Gwynne |
| 2007-04-25 | format string fix | David Gwynne |
| 2007-04-25 | add some debug to the tx paths so i can see packets go on and off the hw. | David Gwynne |
| 2007-04-25 | fix the conditions that the tx free path keeps looping on so that it will | David Gwynne |
| 2007-04-25 | configure the 10G mac and enable (more) interrupts when the interface is | David Gwynne |
| 2007-04-25 | split tht_fifo_ready into tht_fifo_writable and tht_fifo_readable. the way | David Gwynne |
| 2007-04-25 | start implementing interrupt handling. | David Gwynne |
| 2007-04-25 | add more register definitions, in particular the interrupt ones. | David Gwynne |
| 2007-04-25 | im an idiot. for (;;) { } while (condition); loops forever, no matter what | David Gwynne |
| 2007-04-25 | add some debug goo to be used soon | David Gwynne |
| 2007-04-24 | use the fifos ready byte counter in the firmware loading. | David Gwynne |
| 2007-04-23 | increment opackets and ipackets. clear OACTIVE when tx completes. | David Gwynne |
