| Age | Commit message (Expand) | Author |
|---|
| 2007-04-30 | fix dmesg; ok dlg | Theo de Raadt |
| 2007-04-29 | missing arguments in a couple of printfs. | David Gwynne |
| 2007-04-29 | Nadav Shemer of Tehuti Networks is magical. | David Gwynne |
| 2007-04-29 | clocks and pll register bits | David Gwynne |
| 2007-04-29 | we dont want to completely fill fifos, so leave a gap when we calculate | David Gwynne |
| 2007-04-29 | when we post a fifo we're giving the dma mem back to the hardware, so we | David Gwynne |
| 2007-04-29 | when completing a tx pkt, put it back on the tx free list, not the rx one. | David Gwynne |
| 2007-04-27 | Correct typo in comment, no code changes | Chad Loder |
| 2007-04-27 | Fix copy/paste-o in offset of TDINTCM register jointly spotted by dlg and | Chad Loder |
| 2007-04-27 | my txt fifo write bug is extremely strange. i need a delay before the | David Gwynne |
| 2007-04-25 | hook the rx path up. | David Gwynne |
| 2007-04-25 | add some dprintfs to the fifo handlers. | David Gwynne |
| 2007-04-25 | when populating the rxf fifo, actually sync the rxf fifo at the start and | David Gwynne |
| 2007-04-25 | we only have to mask interrupts once when we bring the interface down | David Gwynne |
| 2007-04-25 | i got a reg init wrong, still no tx completion though. | David Gwynne |
| 2007-04-25 | enable tx completion interrupts and provide handling for them. | David Gwynne |
| 2007-04-25 | fix a dprintf in the debug path | David Gwynne |
| 2007-04-25 | more register init in tht_up | David Gwynne |
| 2007-04-25 | put a two second timeout on the chip init after the firmware is loaded | David Gwynne |
| 2007-04-25 | shift some bits like the spec says i should. | David Gwynne |
| 2007-04-25 | format string fix | David Gwynne |
| 2007-04-25 | add some debug to the tx paths so i can see packets go on and off the hw. | David Gwynne |
| 2007-04-25 | fix the conditions that the tx free path keeps looping on so that it will | David Gwynne |
| 2007-04-25 | configure the 10G mac and enable (more) interrupts when the interface is | David Gwynne |
| 2007-04-25 | split tht_fifo_ready into tht_fifo_writable and tht_fifo_readable. the way | David Gwynne |
| 2007-04-25 | start implementing interrupt handling. | David Gwynne |
| 2007-04-25 | add more register definitions, in particular the interrupt ones. | David Gwynne |
| 2007-04-25 | im an idiot. for (;;) { } while (condition); loops forever, no matter what | David Gwynne |
| 2007-04-25 | add some debug goo to be used soon | David Gwynne |
| 2007-04-24 | use the fifos ready byte counter in the firmware loading. | David Gwynne |
| 2007-04-23 | increment opackets and ipackets. clear OACTIVE when tx completes. | David Gwynne |
| 2007-04-23 | spelling in comment fix. | David Gwynne |
| 2007-04-23 | when we use a fifo we always seem to need to know how much of the fifo is | David Gwynne |
| 2007-04-23 | replace the code in the rxf and txt fifo handlers that loads the dma | David Gwynne |
| 2007-04-23 | add tht_write_dmap, and tht_write_pad. | David Gwynne |
| 2007-04-22 | process the tx free queue. this indicates when transmitted packets have | David Gwynne |
| 2007-04-22 | this is the start of the transmit path. this takes packets off the | David Gwynne |
| 2007-04-22 | only printf if the firmware load failed. | David Gwynne |
| 2007-04-22 | hookup bpf. this pushes packets along bpf on the rx side. i need to write | David Gwynne |
| 2007-04-22 | start implementing processing of the rx descriptor fifo. this is the one | David Gwynne |
| 2007-04-22 | i seem to be having lots of trouble with writing bus_dmamap_sync calls | David Gwynne |
| 2007-04-22 | macros for accessing bits of the rx descriptors | David Gwynne |
| 2007-04-21 | fill the rx free fifo on interface up, and drain it on interface down. | David Gwynne |
| 2007-04-21 | tht wants at least 128 bytes in the first physical segment of an rx buffer | David Gwynne |
| 2007-04-21 | rename tht_rx to tht_rxf_fill to avoid confusion. | David Gwynne |
| 2007-04-21 | add tht_rx. this function will try to fill as much of the rx free fifo as | David Gwynne |
| 2007-04-21 | simplify some maths in fw_load a bit | David Gwynne |
| 2007-04-21 | allocate a small list of tx and rx descriptors on interface up and down. | David Gwynne |
| 2007-04-21 | quick macro to figure out how many 64bit words a buffer will use. | David Gwynne |
| 2007-04-21 | create struct tht_pkt to keep track of mbufs that are on the hardware and | David Gwynne |
