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path: root/sys/dev/pci/if_tht.c
AgeCommit message (Expand)Author
2007-09-19M_ZERO. all the cool kids are doing it.David Gwynne
2007-07-22clear the IFF_ALLMULTI flag when the interface goes down.David Gwynne
2007-07-22the softc variable is sc, not sp.David Gwynne
2007-05-28use memcpy when copying to/from the fifos, apparently gcc can do a betterDavid Gwynne
2007-05-26chop ETHER_ALIGN off the size of the packet we tell the hw we can doDavid Gwynne
2007-05-26ETHER_ALIGN rx mbuf so that it works on strict alignment archs. OK dlg@Claudio Jeker
2007-05-26correctly byteswap the mac address when moving it on and off teh cardDavid Gwynne
2007-05-17copy the lladdr from the arpcom struct onto the hardware when the interfaceDavid Gwynne
2007-05-17support changing the mtu up to the maximum frame size it currentlyDavid Gwynne
2007-05-16add support for multicast addresses. this adds the add/del multi handlersDavid Gwynne
2007-05-08make a start at dealing with interface flags. this toggles the hardwareDavid Gwynne
2007-05-08add the multicast filter registersDavid Gwynne
2007-05-08write the mac back to the chip when we bring it up.David Gwynne
2007-05-06point the macros for the interrupt coalescing registers at the rightDavid Gwynne
2007-05-06typoDavid Gwynne
2007-05-04the hardware does checksumming on rx as well. mark the mbufs with what theDavid Gwynne
2007-05-04advertise tx checksumming to the network stack, and tell the hardware toDavid Gwynne
2007-05-04increase the number of tx and rx descriptors from 64 to 128 eachDavid Gwynne
2007-05-04call the right function to fill the rxf fifo after rxdDavid Gwynne
2007-05-04disable debugging outputDavid Gwynne
2007-05-04put more rx descriptors back on the chip straight after we've taken someDavid Gwynne
2007-05-04wrap the wptr round when we hit the end of the fifo.David Gwynne
2007-04-30fix dmesg; ok dlgTheo de Raadt
2007-04-29missing arguments in a couple of printfs.David Gwynne
2007-04-29Nadav Shemer of Tehuti Networks is magical.David Gwynne
2007-04-29clocks and pll register bitsDavid Gwynne
2007-04-29we dont want to completely fill fifos, so leave a gap when we calculateDavid Gwynne
2007-04-29when we post a fifo we're giving the dma mem back to the hardware, so weDavid Gwynne
2007-04-29when completing a tx pkt, put it back on the tx free list, not the rx one.David Gwynne
2007-04-27Correct typo in comment, no code changesChad Loder
2007-04-27Fix copy/paste-o in offset of TDINTCM register jointly spotted by dlg andChad Loder
2007-04-27my txt fifo write bug is extremely strange. i need a delay before theDavid Gwynne
2007-04-25hook the rx path up.David Gwynne
2007-04-25add some dprintfs to the fifo handlers.David Gwynne
2007-04-25when populating the rxf fifo, actually sync the rxf fifo at the start andDavid Gwynne
2007-04-25we only have to mask interrupts once when we bring the interface downDavid Gwynne
2007-04-25i got a reg init wrong, still no tx completion though.David Gwynne
2007-04-25enable tx completion interrupts and provide handling for them.David Gwynne
2007-04-25fix a dprintf in the debug pathDavid Gwynne
2007-04-25more register init in tht_upDavid Gwynne
2007-04-25put a two second timeout on the chip init after the firmware is loadedDavid Gwynne
2007-04-25shift some bits like the spec says i should.David Gwynne
2007-04-25format string fixDavid Gwynne
2007-04-25add some debug to the tx paths so i can see packets go on and off the hw.David Gwynne
2007-04-25fix the conditions that the tx free path keeps looping on so that it willDavid Gwynne
2007-04-25configure the 10G mac and enable (more) interrupts when the interface isDavid Gwynne
2007-04-25split tht_fifo_ready into tht_fifo_writable and tht_fifo_readable. the wayDavid Gwynne
2007-04-25start implementing interrupt handling.David Gwynne
2007-04-25add more register definitions, in particular the interrupt ones.David Gwynne
2007-04-25im an idiot. for (;;) { } while (condition); loops forever, no matter whatDavid Gwynne
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