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ok drahn@
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Use correct size to zero sdparam area for 12160.
Compile tested: sparc64, sparc
run tested: sparc64 (2200, 1040), sparc (sbus isp)
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running ABOUT FIRMWARE with some that were started by BIOS downloads).
Fix the incorrect parsing of the Risc2Host isr. For RIO_16,
fast posting command completion, and fast post CTIO completion,
the upper half of Risc2Host is a copy of mailbox #1- *not*
mailbox #0.
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Do not attach to AMI Raid Units (known via Sub Vendor ID) because they
really *aren't* quite a QLogic ISP device, now are they?
Split 2300 from 2312 types. Turn off pci parity for 2300s (per QLogic
errata).
Add missing ISPR2HST_RIO_16 case.
At isp_pci_reset1 time, turn on interrupts if we say it's okay to do so.
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the response queue. Instead of the ad hoc ISP_SWIZZLE_REQUEST, we now have
a complete set of inline functions in isp_inline.h. Each platform is
responsible for providing just one of a set of ISP_IOX_{GET,PUT}{8,16,32}
macros.
The reason this needs to be done is that we need to have a single set of
functions that will work correctly on multiple architectures for both little
and big endian machines. It also needs to work correctly in the case that
we have the request or response queues in memory that has to be treated
specially (e.g., have ddi_dma_sync called on it for Solaris after we update
it or before we read from it).
One thing that falls out of this is that we no longer build requests in the
request queue itself. Instead, we build the request locally (e.g., on the
stack) and then as part of the swizzling operation, copy it to the request
queue entry we've allocated. I thought long and hard about whether this was
too expensive a change to make as it in a lot of cases requires an extra
copy. On balance, the flexbility is worth it. With any luck, the entry that
we build locally stays in a processor writeback cache (after all, it's only
64 bytes) so that the cost of actually flushing it to the memory area that is
the shared queue with the PCI device is not all that expensive. We may examine
this again and try to get clever in the future to try and avoid copies.
Another change that falls out of this is that MEMORYBARRIER should be taken
a lot more seriously. The macro ISP_ADD_REQUEST does a MEMORYBARRIER on the
entry being added. But there had been many other places this had been missing.
It's now very important that it be done.
For OpenSD, it does a ddi_dmamap_sync as appropriate. This gets us out of
the explicit ddi_dmamap_sync on the whole response queue that we did for SBus
cards at each interrupt. Now, because SBus/sparc doesn't use bus_dma, some
shenanigans were done to support this. But Jason was nice enough to test the
SBus/sparcv9 changes for me, and they did the right thing as well.
Set things up so that platforms that cannot have an SBus don't get a lot of
the SBus code checks (dead coded out).
Additional changes:
Fix a longstanding buglet of sorts. When we get an entry via isp_getrqentry,
the iptr value that gets returned is the value we intend to eventually plug
into the ISP registers as the entry *one past* the last one we've written-
*not* the current entry we're updating. All along we've been calling sync
functions on the wrong index value. Argh. The 'fix' here is to rename all
'iptr' variables as 'nxti' to remember that this is the 'next' pointer-
not the current pointer.
Devote a single bit to mboxbsy- and set aside bits for output mbox registers
that we need to pick up- we can have at least one command which does not
have any defined output registers (MBOX_EXECUTE_FIRMWARE).
Explicitly decode GetAllNext SNS Response back *as* a GetAllNext response.
Otherwise, we won't unswizzle it correctly.
Nuke some additional __P macros.
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Most work by Wilbern Cobb <vedge@csoft.org> with some fixes from me, mickey@
and drahn@.
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the target mode code.
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on some platforms, after a while they'll think it's all spurious and
disconnect the interrupt routing. Thereupon Bad Things Happen (tm).
Approved by: Theo.
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Add support for 2 Gigabit cards (2300/2312). This necessitated a change
in how interrupts are down- the 23XX has not only a different place to check
for an interrupt, but unlike all other QLogic cards, you have to read the
status as a 32 bit word- not 16 bit words. Rather than have device specific
functions as called from the core module (in isp_intr), it makes more sense
to have the platform/bus modules do the gruntwork of splitting out the
isr, semaphore register and the first outgoing mailbox register (if needed)
*prior* to calling isp_intr (if calling isp_intr is necessary at all).
Rearchitect how regular SCSI parameters are stored or used.
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conversion (luckily only sparc64 uses the 5 arg form so far =)
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All callers actually took all arguments to pci_intr_map from pci_attach_args
structs, so this simplifies code.
This also allows more complicated interrupt assignment schemes like the one
on sparc64.
This makes sparc64 pci interrupts work.
Inspired by the same change in NetBSD.
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Handles are 16 bits now.
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lack of parameter memory. Set logging defaults sanely. Set default node
&& port WWNs separate from other platforms. Make sure we set up HBA role
correctly.
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Major rewrite of a lot of internals- far too many to list. Cleaner
locking, more paramaterization, an isp_prt logging function that
handles debugging as well as error printouts. We also should no
longer hang if there is no Loop for Fibre Channel when booting.
The file ispvar.h now contains a list of all platform required macros
and explanation as to what they're for. This should make maintenance
easier.
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more than 12 byte) for parallel SCSI.
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Other than some extra cases, there's a bit of hoohah about reading the
second SXP's register bank on the 1280- not exactly well laid out
hardware. The delay(250) functions added to see if this helps in more
stable reads of SXP register bits.
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FABRIC support...
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for early revision 2100 boards. Make sure to turn ROM off for these
boards.
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Federico G. Schwindt <fgsch@cvs.openbsd.org>
for pointing it out. Fix OpenBSD header per his
suggestion also.
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