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path: root/sys/dev/pci/mpiireg.h
AgeCommit message (Expand)Author
2019-12-29The name field of struct mpii_cfg_raid_vol_pg1 is 16 bytes, not 32.Jonathan Matthew
2019-09-12SAS3 controllers have a maximum size for sgl chain segments, and theJonathan Matthew
2018-06-19Add support for SAS3.5 controllers. This involves reorderingJonathan Matthew
2017-01-16Clean up SCSI operation status and state definesMike Belopuhov
2016-10-24augment the scsi_probe handler so it tries to query the sas dev pg 0David Gwynne
2016-09-14add support for SAS3 devices, which have a different sgl layout to previousJonathan Matthew
2014-03-27last of the htolem32 bitsDavid Gwynne
2014-03-27everything is at least 4 byte alignedDavid Gwynne
2014-03-27the request and reply descriptors are 8 byte aligned for the hardware.David Gwynne
2014-03-24scsi io bits are at least 4 byte alignedDavid Gwynne
2014-03-24mpii_sges are 4 byte aligned. makes storing the flags field a bit easierDavid Gwynne
2014-03-24make mpii_sge look like mpi_sge, and provide a wrapper for setting theDavid Gwynne
2012-09-28update my copyrightMike Belopuhov
2012-08-23whitespace cleanup; no functional changeMike Belopuhov
2012-08-14split the definitions of the hardware out into a separate file so it canDavid Gwynne