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path: root/sys/dev/pci/pciide.c
AgeCommit message (Collapse)Author
2003-08-01Fix ICH5R SATA supportAlexander Yurchenko
2003-07-30Experimental support for ICH5/ICH5R SATA, inspired from FreeBSDAlexander Yurchenko
ata driver.
2003-07-29Support for HPT302 and HPT371, inspired from the FreeBSD ata driver.Alexander Yurchenko
Thanks to otto@ for help in regress testing and tedu@ for unslacking me.
2003-07-23Enable ATAPI DMA for modern Promise ATA controllers since only oldAlexander Yurchenko
ones have problems with it. Tested on PDC20262/268/269.
2003-07-23Old Promise ATA controllers need some additional operationsAlexander Yurchenko
during DMA transfers to work correctly with LBA48 drives. Based on diff from Takeshi Nakayama <tn@catvmics.ne.jp> for NetBSD with some corrections from FreeBSD ATA driver.
2003-07-20acer chips seem to work with atapi dma now. ok grange@Ted Unangst
2003-06-18For HPT370 chips disable interrupt prediction and correct timingAlexander Yurchenko
value for UDMA5. Enable UDMA5 for HPT370A again since it's safe now. Work by Otto Moerbeek <otto@drijf.net> via PR 3282. Help in testing from gluk@.
2003-06-07Experimental support for Intel 31244 SATA, only parallel ATA mode yet;Alexander Yurchenko
from NetBSD.
2003-06-07Add a generic channel setup routine for SATA devices; from NetBSDAlexander Yurchenko
2003-06-06Add support for Intel ICH5/ICH5R IDEAlexander Yurchenko
2003-05-30Cleanup: \t vs spaces, kill trailing spacesAlexander Yurchenko
2003-05-22Support for Intel ICH4-M; from marius aamodt eriksen <marius@monkey.org>.Alexander Yurchenko
2003-05-17Experimental support for SiI 3112 SATA card; from NetBSD.Alexander Yurchenko
Thanks to chris@ for this card.
2003-05-17Allow chip-specific setup routines to change dma engine parametersAlexander Yurchenko
(size and align of dma segment) since some chips may have quirks; from NetBSD. ok millert@
2003-05-17Add debug warning messages about missing 80-wire cable to allAlexander Yurchenko
cable checking procedures. ok millert@
2003-05-02Rework SIS IDE support. Unbreak the newest chips and fix issues with theAlexander Yurchenko
old ones. Original work by sos@freebsd, then adapted for netbsd by bouyer@netbsd. Many thanks to Paul de Weerd <paul@mail.me.maar.nu> for problem report, providing url to the preliminary netbsd diff and access to testing machine. Extra testing by tedu@.
2003-04-27strcpy/sprintf cleanup of sys/dev. miod@, deraadt@ says to commit.Hakan Olsson
2003-04-20In pdc20265_pci_intr() perform shared irq check only if channel isAlexander Yurchenko
enabled since it reqires accessing channel's bus space. Problem reported by Armin Wolfermann <aw@osn.de>.
2003-03-29Very limited support for Promise PDC20376 SATA. Only parallel ATAAlexander Yurchenko
compatibility mode works for now. Based on tests by Jedi/Sector One <j@pureftpd.org>.
2003-03-28unbreak after SiS pcidevs changeTodd C. Miller
2003-03-28Improve debug output a bitAlexander Yurchenko
2003-03-06Support for ServerWorks CSB6 IDEAlexander Yurchenko
2003-02-24Detypoing; henric@ and meAlexander Yurchenko
2003-02-24For CMD chips call pciide_chan_candisable() for both channels to preventAlexander Yurchenko
setuping channel 0 without any drives. This solves a long delay during the pciide probe on a diskless sparc64. Found and tested by miod@.
2003-02-21Fix Manuel Bouyer's copyright, from NetBSDAlexander Yurchenko
ok deraadt@
2003-02-13Final part of NVIDIA nForce/nForce2 IDE support:Alexander Yurchenko
- registers definitions - timing values setup - cable detection Partially from Linux, FreeBSD and AMD specs. Many thanks to Johan Lindman <tybollt@solace.mh.se> for providing access to the testing machine. ok gluk@
2003-02-13Add cable detection for AMD chips, directly from AMD specs.Alexander Yurchenko
Tested by todd@; ok gluk@
2003-01-30Many Ultra 5s likes to hang when starting. The last thing on the consoleHenric Jungheim
is: "pcons at mainbus0 not configured". The problem is that the IDE chip asserts a PCI interrupt line even while the registers on the chip claim that it is not. Doing a channel reset helps, but is almost certainly only a work-around for the real problem. Several other work-arounds have been suggested, but this one has had the most testing. Many have looked and helped (notably grange@). Thanks. ok jason@
2003-01-1780-pin -> 80-wire in debug output; requested by chris@Alexander Yurchenko
2003-01-16Missing breakAlexander Yurchenko
2003-01-16- add two inline functions for accessing chip configuration spaceAlexander Yurchenko
through the index and data registers - proper registers and bits names - more debug in cable detection - back the code for checking interrupt asserting in case of shared IRQ, it seems to solve the problem with repeatable ``bugus intr'' messages in PDC20376 (one more step to get it working); based on tests by j@pureftpd.org Some input and ok from costa@
2003-01-16Add channel number to report of registers mapping type.Alexander Yurchenko
2003-01-16Don't hardcode IO mapping for cmd/ctl regs, use pci_mapreg_type()Alexander Yurchenko
instead. This allows chips with memory mapped registers (e.g. Promise PDC20376) to work. ok costa@
2003-01-15revert last change; request from mickey@Alexander Yurchenko
2003-01-14Add a define for easy access to sc_wdcdev.sc_dev.dv_xnameAlexander Yurchenko
2003-01-13Add experimental support for NVIDIA nForce/nForce2 IDE chips.Alexander Yurchenko
Tested by Johan Lindman <tybollt@solace.mh.se> ok costa@
2002-12-19Protect WDCDEBUG_PRINT macro with do {} while (0)Alexander Yurchenko
ok costa@
2002-12-10Add support for VIA VT8231; from NetBSD, untested.Alexander Yurchenko
ok gluk@
2002-11-24Check whether the chip enabled or not by reading status register.Alexander Yurchenko
Close PR 2980 ok gluk@
2002-11-20o change dma engine registers macros so that the channelAlexander Yurchenko
specifying is required o fix missed offsets for the secondary channel which were found with the help of this new more strict semantics; this can solve many old problems tested by gluk@, jason@ ok gluk@
2002-11-20Overhaul natsemi driver:Jason Wright
- setup the DMA bits on the second channel correctly (missing channel offset) - setup timing for PIO/DMA modes - workaround the fact that the INTR/ERR clear bits are in the wrong register - only read the interrupt mask register once in the interrupt path Many thanks to grange@ for assistance and debugging!
2002-11-18typo; gluk@ okAlexander Yurchenko
2002-11-17o fix cp->name usage: since it's initialized with PCIIDE_CHANNEL_NAME()Alexander Yurchenko
macro it already contains a word ``channel'', so there's no need to print it twice o report when channel is disabled due to the absence of drives on it (idea from NetBSD) close PR 2973 ok costa@ gluk@
2002-11-15o add support for VIA VT8233 and VT8235Alexander Yurchenko
VT8233 tested by jolan@cryptonomicon.org, VT8235 untested o correct VIA timings for UDMA 5 o don't set the APO_UDMA_CLK66 bit for UDMA 5 capable chipset from NetBSD gluk@ ok
2002-11-08Support for Promise PDC20275 and PDC20277. Untested.Grigoriy Orlov
from grange@rt.mipt.ru
2002-11-08Don't check IRQ assertion since this code was derived from FreeBSDGrigoriy Orlov
without any documentation and breaks second channel support. Supplied and tested by grange@rt.mipt.ru. Thanks to Evgeniy Polyakov <johnpol@2ka.mipt.ru> for hardware donation.
2002-10-12Remove more '\n's from panic() statements. Both trailing and leading.Kenneth R Westerback
Diff generated by Chris Kuethe.
2002-09-09Add support of Silicon Image 0680 Ultra ATA/133 Controller.Grigoriy Orlov
Code from NetBSD. Submitted and tested by Jonathon Fletcher <jonathon.fletcher@pobox.com>.
2002-08-30Support for PDC20271 and PDC20276.Grigoriy Orlov
Enable UDMA6 for Ultra133 chips (PDC20269, PDC20271 and PDC20276). PDC20271 and PDC20276 not tested, but Free/NetBSD's source code claims that they works the same as the PDC20269. from Alexander Yurchenko <grange@rt.mipt.ru> csapuntz@ ok.
2002-08-09Get rid of remaining __P usage (except for imported code);Jason Peel
ok millert@, rogue ok pjanzen@
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