Age | Commit message (Collapse) | Author |
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from brad
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Tested by bwaichu@yahoo.com.
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From and tested by minusf@obiit.org
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we allow for Intel SCH chips.
From tharada@oucrc.org in PR 6232, verified against the datasheet.
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there.
ok jsg
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done using a chipset unmap callback.
Still needs to work to distinguish between compat
register mappings and compat interrupts so we
don't get caught out.
Tested with a diskless sii3112 CardBus eSATA controller
by me, and testing and feedback by deraadt@ with
a phison based expresscard SSD.
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on an expresscard SSD adaptor.
ok jsg
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ok deraadt@
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Tested on a p series vaio.
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Tested by Christian Stuermer.
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From/Tested by Laurence Tratt on an asus p5n7a board.
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originally written by Juan Romero Pardines.
Thanks to Lars Kotthoff for testing on a HeroLogic HL-463 system.
Because the CS5535 doesn't provide SMM emulated PCI access to set
DMA/PIO modes or a real PCI IDE controller we have to resort to
making MSR calls. As this is very MD specific, hide most of uglyness
away in i386 MD pciide code.
ok grange@
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a header file where MD code can get at them.
ok grange@
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appears the machine Mark got had a disk which failed very soon after
that
ok kettenis
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Found by LLVM/Clang Static Analyzer.
ok brad@
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work and this way we fall back on PIO which does work. I'm pretty sure
this is caused by bugs in our code, but I cannot find them.
ok deraadt@, marco@
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as they're of the subclass SATA and the SiI3512 SATA controller as it is of
the subclass MISC.
ok jsg@
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to be MASS_STORAGE subclass IDE regardless of id, and other
ids depending on the subclass and a known id or a known id
and the override flag.
We really want to check the subclass so we don't attach
pciide to the wrong function of a chip, which happened
last time around before the additional subclasses were
checked in the non override case and the overrides were pulled.
A bunch of the override flags were pulled after some common
subclasses (SATA/RAID) were added. So if we have a known
id and a SATA/RAID subclass we would match. Turns out some
Silicon Image SATA devices claim to be of subclass MISC
so add that as well. Unbreaks one of hennings machines
with 3114 SATA and likely quite a few other machines.
'seems safe enough to me' miod@
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On socppc it has the subclass PCI_SUBCLASS_MASS_STORAGE_MISC
so without the quirk socppc will not find its disk.
-moj
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CMD Technology, Silicon Image, VIA, SiS, Broadcom, and ATI IDE/SATA
chipsets.
ok jsg@
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NetBSD code it was based on did/does, now we have it.
This makes detecting sis 96x work properly without having to
do silly things like adding host bridges in the list. Of
course we wouldn't be in this mess in the first place if sis
designed their chips properly instead of reusing the same
pci id.
Add 964/965 devices while here.
Tested by todd@ on a machine with 965.
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tested by drahn@, "looks right to me" deraadt@
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ok jsg@ "please kill it" marco@ "no objections" krw@
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From Antonio Marques <froz@icix.org> in PR 5718.
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so rename it and add a CX700 id.
Tweaked version of a diff from dtrombley@dslindiana.com who tested
with a board with the new id.
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ok dlg@
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sys/dev/pci/pciide.c from naddy@
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Tested by damien@
ok dlg@
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ok dlg@
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safely, so i tried it and it worked great. i can reuse the pci_attach_args
to attach ahci and now pciide to jmb without really modifying either of
them. lots of code shrinks.
ok jsg@
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integrated on the PC87560 Legacy IO chip found on several hppa workstation
models.
ok jsg@
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Tested by jcs@ on a model 2 oqo.
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Tested by Daniel Dickman <didickman@gmail.com>
pciide(4) does not need to be updated as it does not split
SATA/IDE support up into different sections (ICH8M already listed).
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Pointed out by deraadt@
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some chips generate interrupts we don't expect, but we need to ack those.
Fixes the cdrom hangs on various sparc64 systems.
tested by some, ok deraadt@
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Tested by Graeme Lee <graeme@omni.net.au>
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G5, might work a lot better soon)
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JMB368 supported for now, multi port cards
that share PATA/SATA need to do a complicated
internal channel mapping dance I plan to look into next.
ok grange@
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set the proper UDMA capability for MCP61 and MCP65 chipsets.
ok jsg@
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The disk in the AMD Geode LX-800-based system now works much faster.
hints grange@; ok jsg@
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no functional change.
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