| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2013-05-27 | Fix edge cases of uninitialized variables. In my tree for too long, I even | Miod Vallat | |
| got ok's for azalia but I don't remember from whom. | |||
| 2013-01-05 | - add some intel 7 series sata ids. | Jasper Lievisse Adriaanse | |
| ok jsg@ | |||
| 2012-10-08 | Revamp the sequences for suspend/hibernate -> resume so that the code | Theo de Raadt | |
| paths are reflexive. It is now possible to fail part-way through a suspend sequence, and recover along the resume code path. Split DVACT_SUSPEND by adding a new DVACT_POWERDOWN method is used after hibernate (and suspend too) to finish the job. Some drivers must be converted at the same time to use this instead of shutdown hooks (the others will follow at a later time) ok kettenis mlarkin | |||
| 2012-04-22 | VT6410 and VT6415 controllers do not implement the `channel enable' register, | Miod Vallat | |
| so don't incorrectly assume both channels are disabled on these controllers. ok jsg@ | |||
| 2012-03-13 | Don't call wdcintr() for channels that aren't properly initialized or don't | Mark Kettenis | |
| have any drives on them. Fixes a panic seen on sparc64 machines with that pesky Acer Labs chipset. ok deraadt@, krw@, henning@ | |||
| 2012-01-15 | As SiS IDE has the same PCI product id for different revisions | Jonathan Gray | |
| with different bugs the host bridge is used to determine which path to take. As pointed out by Chris Cappuccio we need to expand this list to cover newer chips SiS have inflicted on the world. From and tested by Loganaden Velvindron (on SiS 968). | |||
| 2012-01-04 | Add support for SiS 1183 SATA. From/tested by Loganaden Velvindron. | Jonathan Gray | |
| 2011-11-12 | Unbreak tree after kettenis's sanitization in pcidevs | Philip Guenthe | |
| ok krw@ | |||
| 2011-11-02 | Make sure we set UDMA capabilities for HT-1000 IDE, | Jonathan Gray | |
| this was missed when support for HT-1000 IDE was added. From Brad. | |||
| 2011-09-17 | use default_chip_unmap for sata_chip_map, lets the via controllers detach | Jonathan Gray | |
| ok deraadt@ | |||
| 2011-07-15 | Cope with the start-dma-before-init errata and some other register setup | Theo de Raadt | |
| errata for the Serverworks SATA chipset found on the macppc xserve G5. ok jmc | |||
| 2011-07-11 | pass the interface for non-compat-mode piix. from netbsd. | joshua stein | |
| ok deraadt@ jsg@ | |||
| 2011-05-09 | Refactor queue allocation and initialization into a wdc_alloc_queue() | Matthew Dempsky | |
| function, and let attachment code calls this rather than malloc(9). This prevents re-initialization of the queue in shared queue chipsets. Also, add wdc_free_queue() as a complementary function. Earlier version (without wdc_free_queue()) tested by sthen@ and Amit Kulkarni on various pciide(4) chips. ok dlg@ | |||
| 2011-05-09 | Initialize the wdc ata_drive_datas structs earlier in wdcattach() so | Matthew Dempsky | |
| that chip-specific drv_probe routines can assume they've already been initialized. Tested by sthen@ on i386, armish, and amd64, with both affected and non-affected pciide(4) chips. ok dlg@ | |||
| 2011-04-27 | support Intel 6 series SATA in non raid/non ahci mode. | Jonathan Gray | |
| tested by Daniel Dickman | |||
| 2011-04-18 | keep an eye out for wdc registers returning 0xff. if they return 0xff, | Theo de Raadt | |
| this probably means the controller is dead -- as in, a hot plug eject event. in that case, mark the driver dead and try harder to return -1 in the interrupt handler. tested by many ok dlg, miod did not object | |||
| 2011-04-14 | add support for VIA VT6415 & VX900 IDE | Jonathan Gray | |
| 2011-04-07 | Avoid using an uninitialized variable when downgrading PIO mode too much on | Miod Vallat | |
| ITExpress chipsets. (similar to 1.243, with a deja vu) | |||
| 2011-04-03 | use nitems(); no binary change for drivers that are compiled on amd64. | Jasper Lievisse Adriaanse | |
| ok claudio@ | |||
| 2010-11-18 | Mark NVIDIA MCP89 SATA controllers as such. Makes them use DMA instead of PIO | Mark Kettenis | |
| such that we get decent performance out of them. ok jsg@ | |||
| 2010-11-06 | Revision 0xc4 and earlier of the Acer Labs M5229 UDMA IDE controller can't do | Mark Kettenis | |
| DMA for LBA48 commands. Work around this issue by (silently) falling back to PIO for LBA48 commands. Access to the tail end of large disks will be much slower, but at least it works. From NetBSD (Takeshi Nakayama). ok jsg@, krw@, deraadt@ | |||
| 2010-08-31 | Add DVACT_QUIECE support. This is called before splhigh() and before | Theo de Raadt | |
| DVACT_SUSPEND, therefore DVACT_QUIECE can do standard sleeping operations to get ready. Discussed quite a while back with kettenis and jakemsr, oga suddenly needed it as well and wrote half of it, so it was time to finish it. proofread by miod. | |||
| 2010-08-31 | no need to specially handle the 4 AMD756 registers at suspend/resume time; | Theo de Raadt | |
| they fall within the pcipower() handled range. ok miod | |||
| 2010-08-31 | PCI configuration space register save/restore for AMD756. | Miod Vallat | |
| 2010-08-06 | ok, that is the last of the easy chips to check for register saves. i'm | Theo de Raadt | |
| going to give up on reading gobs of crap for a while and hope that someone else takes on the next few. | |||
| 2010-08-06 | another set of chips which do not need register rewrites at resume time | Theo de Raadt | |
| 2010-08-03 | no special registers to restore on via chips either | Theo de Raadt | |
| 2010-08-02 | jmicron code was writing to the wrong register; ok jsg | Theo de Raadt | |
| 2010-08-02 | Save/restore more registers at suspend/resume for those chips which look | Theo de Raadt | |
| like they need it. (Or don't, when it appears they don't need it) | |||
| 2010-07-28 | the default pciide chip needs no additional register restores; tested by jcs ↵ | Theo de Raadt | |
| on one model | |||
| 2010-07-28 | suspend save/restore for SIS3112; tested by mlarkin | Theo de Raadt | |
| 2010-07-23 | Manuel Bouyer rescinded clauses 3 and 4 of his license text. | Jonathan Gray | |
| 2010-07-23 | For suspend/reume, ATI IXP chips (might) need 0x40-0x56 saved.. but | Theo de Raadt | |
| these the 6 registers already saved | |||
| 2010-07-22 | When suspending, save & restore as many registers as we can from the | Theo de Raadt | |
| pciide front-ends chips. More registers will have to added here, chip by chip (warning messages about unknown chipsets, on resume, mean that you should talk to me). Also call the wdc back-end (our child) to have it reset the controller properly on resume. This makes all pciide that we've tested unsuspend. ok kettenis mlarkin | |||
| 2010-04-20 | Don't write garbage to the config space for phison, | Jonathan Gray | |
| we shouldn't be touching the config space at all here. Found by the clang static analyser. ok deraadt | |||
| 2010-04-11 | Send "STANDBY IMMEDIATE" command to ATA disks upon suspend. For this to work, | Mark Kettenis | |
| pciide(4) needs to formward DVACT_SUSPEND and DVACT_RESUME events to its children, so do that. Gets rid of the nasty "click" sound from the disk on many laptops. ok marco@, jsg@ | |||
| 2009-11-21 | EP80579 SATA | Jonathan Gray | |
| 2009-11-01 | add support for the ati sb900^Whudson2 chips. | David Gwynne | |
| from brad | |||
| 2009-10-18 | Match on Intel 3400 SATA. | Jonathan Gray | |
| Tested by bwaichu@yahoo.com. | |||
| 2009-10-17 | Match on MCP77 SATA. | Jonathan Gray | |
| From and tested by minusf@obiit.org | |||
| 2009-10-13 | Correct udma timing register offset and the udma mode ceiling | Jonathan Gray | |
| we allow for Intel SCH chips. From tharada@oucrc.org in PR 6232, verified against the datasheet. | |||
| 2009-10-05 | Fill pciide_unmapregs_compat() with stuff which might work, if we ever get | Theo de Raadt | |
| there. ok jsg | |||
| 2009-10-05 | Add some minimalistic detach/unmap bits for pciide, | Jonathan Gray | |
| done using a chipset unmap callback. Still needs to work to distinguish between compat register mappings and compat interrupts so we don't get caught out. Tested with a diskless sii3112 CardBus eSATA controller by me, and testing and feedback by deraadt@ with a phison based expresscard SSD. | |||
| 2009-09-29 | Support the Phison PS5000. IO Data and other vendors are now using this | Theo de Raadt | |
| on an expresscard SSD adaptor. ok jsg | |||
| 2009-09-05 | Remove unnecessary assignments in sii311[24]_chip_map(). | Miod Vallat | |
| 2009-08-02 | Minor KNF from Brad. No binary change. | Stuart Henderson | |
| 2009-06-26 | add the VIA VX855 chipset | Kevin Lo | |
| ok deraadt@ | |||
| 2009-05-31 | Add SCH IDE support code. | Jonathan Gray | |
| Tested on a p series vaio. | |||
| 2009-04-24 | Add support for ICH10 SATA devices not operating in AHCI mode. | Jonathan Gray | |
| Tested by Christian Stuermer. | |||
| 2009-02-07 | Match on native/legacy MCP79 SATA ids. | Jonathan Gray | |
| From/Tested by Laurence Tratt on an asus p5n7a board. | |||
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