| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2001-02-02 | The read/write indication bit in DMAERR reg is bit 1, not bit 0 | Jason Wright | |
| also, add a mask for the address portion of DMAERR and use it | |||
| 2001-01-29 | grab rng stuff more often (now 6400bytes/sec) | Jason Wright | |
| document the other mcr2 operations and fix a printf (luckily it's never been called =) | |||
| 2001-01-29 | - add infrastructure for dealing with the key generator (MCR2) | Jason Wright | |
| - add support for the onboard rng using that structure - add a interrupt status mask (differs for 5501 and 5601) - reorganize slightly to take into account that MCR1 isn't the only reason for interrupts. | |||
| 2000-08-13 | fix session code | Theo de Raadt | |
| 2000-08-13 | not completely working session code from jason | Theo de Raadt | |
| 2000-08-11 | move mcr out of q; and write prelim mcr aggregation code, which does not yet | Theo de Raadt | |
| work for some reason or another, so it is currently disabled. | |||
| 2000-06-18 | Use the same field data types as the reference code and adjust offsets | Jason Wright | |
| appropriately. Byte swap key/iv fields because they are given to us as "network order", but the chip operates as little endian. coffset is in WORDS not bytes | |||
| 2000-06-12 | ESP 3des now works, after squishing 4 bugs | Theo de Raadt | |
| 2000-06-03 | Move everything to where is supposed to be (reg definitions, etc). | Jason Wright | |
| Add some of the skip logic. | |||
| 2000-05-18 | work in progress: driver for BlueSteel (Broadcom) 5[56]01 crypto accelerator | Jason Wright | |
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index : src | |
| OpenBSD base system |
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