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pci
Age
Commit message (
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)
Author
2013-01-21
myx does reads and writes in one direction to packet buffers. lets try
David Gwynne
2013-01-17
Don't try to access m_head after it may be freed (unlikely for VT6105M,
Chris Cappuccio
2013-01-17
sync
Reyk Floeter
2013-01-17
Add a few more VMware devices.
Reyk Floeter
2013-01-17
Add a hibernate HIB_DONE op. After the memory-side-effect driver finishes
Theo de Raadt
2013-01-17
first or second coming, commie or not commie, one m in coming is sufficient
Henning Brauer
2013-01-17
Force the latest 3 generations of Intel SATA chipsets into AHCI mode.
Claudio Jeker
2013-01-16
Fight global eye bleeding by fixing evil typos.
Miod Vallat
2013-01-16
Loongson: add throttling support.
Paul Irofti
2013-01-16
regen
Brad Smith
2013-01-16
Some corrections for D-Link device names.
Brad Smith
2013-01-16
fix typo in comment
Darren Tucker
2013-01-16
Add hardware VLAN tag/untag support for VT6105M chips. Help/feedback/ok
Darren Tucker
2013-01-16
Sort the PCI ids.
Brad Smith
2013-01-16
Add hardware VLAN tag/untag support for VT6105M chips. Help/feedback/ok
Darren Tucker
2013-01-16
regen
Brad Smith
2013-01-16
Add D-Link DFE-520TX C1
Brad Smith
2013-01-16
Keep a count of packets added to the chip's TX queue and only poke the chip
Darren Tucker
2013-01-15
More syncing with FreeBSD bge version. No binary change.
Claudio Jeker
2013-01-15
Fix typos in comments and change the syntactic sugar of a function to
Claudio Jeker
2013-01-15
put a tab after #define to make the diff between Fx and Ox smaller.
Claudio Jeker
2013-01-15
dont use amd64 is currently broken cos it has no
David Gwynne
2013-01-15
use bus_space_write_raw_region_8 on 64bit archs when writing to the rings
David Gwynne
2013-01-14
map the registers PREFETCHABLE so things that can do write combining can
David Gwynne
2013-01-14
avoid extra bus_space barriers in the interrupt handler.
David Gwynne
2013-01-14
use one interrupt handler for the thtc headend, rather than seperate
Theo de Raadt
2013-01-14
Loongson: Replace the system clock provided by the CPU with a GLX MFGPT.
Paul Irofti
2013-01-14
when posting descriptors to the chips rings, avoid going write barrier
David Gwynne
2013-01-14
the myri doco suggests its nice to post stuff by filling in everything
David Gwynne
2013-01-14
;; is a long way of saying ;
David Gwynne
2013-01-13
Enable flow control support with 5708S/5709S adapters.
Brad Smith
2013-01-12
add viomb driver for virtio balloon device
Stefan Fritsch
2013-01-10
dont hardcode the phy address at 1. the 5718 family of chips can have
David Gwynne
2013-01-10
oh hey guys, ive got this cool new thing called a "switch statement". your
David Gwynne
2013-01-10
macros describing necessary bits on newer chips.
David Gwynne
2013-01-09
Sync the userland facing drm headers with FreeBSD minus some cruft mpi
Jonathan Gray
2013-01-08
a single-com in the Exsys EX-4109x family; Gregory Edigarov <edigarov@qarea.com>
Theo de Raadt
2013-01-05
Enable MSI for rtsx(4). Tested on i386 and amd64.
Stefan Sperling
2013-01-05
- add some intel 7 series sata ids.
Jasper Lievisse Adriaanse
2013-01-04
Attach rtsx(4) only to devices using the 'undefined' PCI class, and do
Stefan Sperling
2013-01-04
fix a logical or that was inteded to be binary in the last revision
Jonathan Gray
2013-01-02
Add the remaining Radeon rv610/rv620/rv630/rv635/rv670,
Jonathan Gray
2013-01-02
regen
Jonathan Gray
2013-01-02
Add the remaining Radeon rv610/rv620/rv630/rv635/rv670,
Jonathan Gray
2012-12-30
add Radeon HD4550
Jonathan Gray
2012-12-22
Add support for U3 brigdes present in macppc G5 machines. Many thanks
Martin Pieuchot
2012-12-21
regen
Jasper Lievisse Adriaanse
2012-12-21
- add some pcidevs taken from a dmesg on bugs@
Jasper Lievisse Adriaanse
2012-12-20
report flow control mode in the media status callback
Mike Belopuhov
2012-12-20
correctly update the current flow control mode
Mike Belopuhov
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