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ok oga@
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in any meaningful way, so just get rid of it.
ok krw@, dlg@
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of pci specific code and the rest of the driver. in hindsight, this was a
stupid thing to do in mpi since there will only ever be pci based mpi
controllers. the same goes for mpii, but unlink mpi it doesnt have the bus
and generic driver split at the file level, just in the code.
this merges the pci and generic mpii autoconf code so its just mpii
autoconf code. apologies for the files.pci change.
tested by me
ok marco@
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for example: outputs.sel7_source= -> outputs.sel7_source=adc-0:1
on the HP HDX 18
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in the PHY instead of the MAC like ICH8.
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from Laurence Tratt based on FreeBSD code. Confirmed to
work on lenovo t410i/t410s/x201.
Desktop machines with PCH tend to be paired with a 82578 PHY,
these will at some point be supported but not yet.
ok claudio@
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in the FreeBSD driver.
ok claudio@
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codec rate). The es1731 has a hardware sample rate converter but
we don't know how to program it (no documentation) and the current
code is wrong (breaks full-duplex).
ok jakemsr, landry
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ioctl requests, and dont pass the proc pointers around for any ioctl
requests in scsi land at all. neither were used, so trim the fat.
ok krw@ marco@
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ok oga@
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- rework auich_halt_pipe() and use it to ensure AUICH_RR is
set only after DMA is halted (spec says to do so)
- rework auich_calibrate(): clear interrupt and event bits in
AUICH_STS and ensure CIV counter is not changed.
- in the interrupt handler, set LVI to (qptr - 1) rather than
the max value (bug introduced by previous commit)
All fixes are from Christopher Zimmermann <madroach at zakweb.de>,
Thanks!
tested on two different intel-based auich devices,
ok jakemsr
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arithmetic shift on signed integers.
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armani@ noticed that is was missing.
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one we use to dump the software interrupt number).
For some strange reason noticed upstream, writeback doesn't seem to be
working for this value for use, so instad of using the get_scratch
functions, we fallback to a direct register read (more bus traffic, but
it actually works).
This is to be used by new mesa on r100 and r200 since they reworked
stuff for dri2, and we have local patches that prevent userland mapping
the registers in dri clients.
Tested by Josh Elsasser on a M9 (rv250), thanks very much to him.
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- save about 26K of kernel memory by giving scsi
subsystem a hint that we won't be using more than
one lun per target;
- remove a debugging leftover.
from Mike Belopuhov <mkb@crypt.org.ru>
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Explain how an invaviant is satisfied and add an assertion to check
(never hit that one). As a side benefit clang doesn't bitch about a
possible NULL deref now.
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that in the reading-only case we need only wait for all gpu writes to be
done and flushed), don't then wait for the full seqno anyway.
Found by Clang's static analyser where it flagged a dead store to the
seqno variable.
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line with everything in the tree. No functional change.
I have wanted to do this for ages! More cleanup will be forthcoming.
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We no longer support these paths, only memory managed mode is now allowed.
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Tested by Brad on: BCM5706, BCM5708C
Tested by me on: BCM5716 (BCM5709 PHY)
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ahci_ata_cmd is called with might be the state of the xfer that
ahci set previously. this stops ahci_ata_cmd from checking the
state of ata_xfers its given, and instead trusts that atascsi is
doing the right thing.
reported and fix tested by matthew dempsky, who also did an awesome
job of tracing the problem.
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For now they are unmaintained, and work on kernel modesetting has very
large inferface changes needing to be made. Also, when the radeon driver
has been converted over, we will no longer support X with the DRI1
protocol, only DRI2.
When the upheaval has finished, these drivers may be brought back after
work to switch them to DRI2 style memory management and kernel
modesetting has been done, but until then they are unsupported and
probably broken (i know at least two of them have been reported broken
before now). ragedrm will likely come back as a component of radeon
(their interfaces are still fairly similar). The other drivers require
rewriting.
I have been threatening to do this for over a year. Discussed with
deraadt@ and matthieu@ at various points since then.
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header.
Found by Clang static analyser.
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low-hanging splbio/splx pairs that are no longer needed and see if
this reveals any hidden scsi flaws.
ok dlg@
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ok krw@
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ok kevlo@, krw@
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based on information in the linux driver.
ok claudio@
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bus_dmamem_alloc(, BUS_DMA_ZERO);
"ok on all the ones with my copyright" marco@
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fence execbuffer logic.
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a fence.
This will stop the case where a newly untiled buffer that has been
reused will be execed as if it was tiled, causing havok.
Solves the PTE errors on mlarkin's 945. He has another bug that he is
currently bisecting for me which I am looking into.
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