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gets some packets onto the rings.
also annoying, but the hardware doesnt report empty rings, we have to
handle it ourselves.
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state unless the chip is up and handling packets. while its down
it does not report the link state, so it is unknown.
this tweaks the link state handling, in particular it adds code to
myx_down so it moves the link state to unknown, ie, it correctly
reflects reality.
stupidity pointed out by deraadt
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by a previous use
ok claudio
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ok kettenis@
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ok dlg@
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it now works on sparc64, too
ok dlg
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1. we want to write raw values to registers all the time, so promote the
myx_raw{read,write} to myx_{read,write} and use them everywhere. get rid
of the raw funcs.
2. i was setting the watermarks on the rx ring before knowhing how big
they were.
3. rxfill in the interrupt handler could lose data if you loop on
sts_isvalid.
almost working now...
"please commit your diff" deraadt@
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back to the unaligned firmware. apparently this is only an issue
on the "A" controllers which have been supersceded, but those are
the chips we (openbsd devs) have.
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10G-PCIE-8A-R. dmesg looks like this:
myx0 at pci4 dev 0 function 0 "Myricom Z8E" rev 0x00: apic 1 int 8, model 10G-PCIE-8A-R, address 00:60:dd:47:c6:74
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the wire (9000 + ether header + vlan tag), but has some cool alignment
requirements. if you want to use a single rx ring desc to point at
a jumbo it needs to start on a 4k boundary and be physically
contiguous. to ensure this im pulling frames from the 12k pool and
waiting for arianes diff to ensure mbufs are contig.
direction from andrew gallatin. tested locally.
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fix a bad lockup i kept getting.
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While this means we are on the way to vt switch a few things want
vblanks interrupts between disabling the cp and the vt switch
(modeset_ctl ioctls for example)
tested by jsg@, found and ok kettenis@.
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Removing a leftover M from my tree makes also my machine happy.
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Abel Abraham Camarillo Ojeda.
From Brad
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From Brad
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1) Allocating with M_WAITOK, checking for NULL, and calling panic() is
pointless (malloc() will panic if it can't allocate) so remove the check
and the call.
2) Allocating with M_WAITOK, checking for NULL, and then gracefully
handling failure to allocate is pointless. Instead also pass M_CANFAIL
so malloc() doesn't panic so we can actually handle it gracefully.
1) was done using Coccinelle.
Input from oga.
ok miod.
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tested by many for over a week. ok kettenis@ phessler@.
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e1000e driver (which enables MSI as well), leaving everything handled by the
old Linux e1000 driver (which doesn't enable MSI) use legacy interrupts.
tested by many; ok jsg@
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the rx ring, schedule a timeout to keep trying until it gets some.
a timeout is used here cos the chip doesnt have a way of reporting
if its out of descriptors or when there's a ring overflow. we have
to manage that ourselves in software.
mikeb reported this issue on an ipsec gateway. ipsec would consume
all the mbufs while they were stuck in crypto waiting for the cpu
to catch up, by which time it was too late to give more to the
hardware. without any rx descriptors the chip would never interrupt
and we'd never try to fill the ring again.
the fix was tested by and is ok mikeb@
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Unknown whether this also applies to product id 3b23 as well as 3b22.
Problem reported by John Danks in PR6630
ok dlg@
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List. So turn a DIAGNOSTIC panic into returning failure.
ok mglocker@, miod@
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in FreeBSD. This seems to fix a lot of problems on 82599 based cards
including the VLAN problems and the corrupted receives.
Putting this in now to work on it in tree since a few additional things
need to be merged. Tested by myself, deraadt@ and jsg@ on both 98er and
99er cards.
OK jsg@, deraadt@
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upcomming ix(4) update.
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by missed interrupts. Commits to the FreeBSD driver suggest that the hardware
has issues. Having MSI for this driver isn't terribly important anyway.
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outside the tree.
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amd64, and fixing things is going to take some time.
ok deraadt@
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Fixes an unaligned access panic on sparc64.
ok miod@, kettenis@, deraadt@, jakemsr@
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make em_write_pci_cfg() do a proper read/modify/write cycle, to avoid changing
the neighbouring 16 bits. Also remove the comment in em_pci_set_mwi() and
em_pci_clear_mwi(); writting 0 to the status bits in the command/status word
is the right thing to do. Fixes a panic on sparc64 and other strict alignment
architectures.
ok deraadt@
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``Reasonably confident that will work on all hardware, go ahead and
commit.'' kettenis (worst jinx ever)
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"i think more pci_intr_map_msi should go in"
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'go for it' oga@
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