Age | Commit message (Collapse) | Author |
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interrupt handler if the "no rx buffer available" bit is set and no new mbufs
are available to populate descriptors. While it doesn't make livelock
mitigation work for everybody, it does resolve some lockup issues.
ok sthen@
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ubsec tested by mikeb, hifn tested by kettenis
ok mikeb
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there was also a local buffer which was left around
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explicit_bzero() where required
ok markus mikeb
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addresses on the mii bus. As a countereasure, only attach the first PHY we
encounter. It is very unlikely we're going to ever see nfe(4) with multiple
PHYs. The same is probably true for any modern NIC.
ok mikeb@, deraadt@
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which are known to have broken ROMs.
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include a fix for Intel Centrino Advanced-N 6250 devices
by Antonio R Nicolosi.
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only clear it if it is != 0 while i'm at it.
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operations to callbacks in the PCI and CardBus front-ends.
This will allow support of other buses like USB.
Assume the following memory model:
- writes are ordered but may be buffered and require explicit flush
- a read always flushes all buffered writes
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to put the device into D3. Fixes PCI power management issues that prevented
acpi (and perhaps apm) suspend on some machines.
tested by & ok mlarkin@
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timed out scsi commands get put on a list and an iohandler is
scheduled. that iohandler pulls the timed out scsi command off the
list and issues a task management request to kill all outstanding
io on the target with the timed out io.
all io killed as a result of this request will be returned to the
midlayer with their status set to XS_RESET, which in turn will cause
the midlayer to retry the command. this relies on the previous
commit.
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in flight. to relevant changes are:
- call the activate(DVACT_DEACTIVATE) function against all the luns
on the target that is going away as soon as possible.
- issue the target reset BEFORE detaching the children devices.
this is needed now tha the midlayer will sleep until all outstanding
commands on a device come back from the adapter before calling the
child devices attach routine.
tested on straight disks and on disks in enclosures.
ok and moral support from krw@
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a physical address [more precisely, something suitable to pass to pmap_enter()'sphysical address argument].
This allows MI drivers to implement mmap() routines without having to know
about the pmap_phys_address() implementation and #ifdef obfuscation.
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ok krw@
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- add my sata controller
ok krw@
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(SD, SD/MMC, MS, xD) parts on Dell XSP L401X that were showing up
as 'unknown'.
ok deraadt@
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* allow ac97(4) flags to be set in envy(4), if there is an ac97 codec
* configure the vt1616 codec on the Dynex DX-SC51 for multi-channel
operation
ok ratchov
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the hardware crypto accelerator land. This fixes aes-ni, via xcrypt,
glxsb(4), hifn(4), safe(4) and ubsec(4) drivers.
Original commit message by angelos:
Don't keep the last blocksize-bytes of ciphertext for use as the next
plaintext's IV, in CBC mode. Use arc4random() to acquire fresh IVs per
message.
with and ok deraadt, ok markus, djm
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heap gap from max data size. nothing else changes yet. ok deraadt
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in *hci_softc
ok miod@, krw@
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configuration space. So on pyro(4) and vpci(4) return the size appropriate
for the extended PCIe configuration space.
ok miod@
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the PCIOCREAD and PCIOCWRITE ioctls.
ok kettenis@ (also ok mikeb@ on an earlier version of this)
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given pcitag_t configuration address space. Currently, all pci controllers
will return the usual 0x100 bytes of PCI configuration space, but this will
eventually change on PCIe-capable controlers.
ok kettenis@
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From PCI Express(R) Base Specification Rev 2.0.
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This is a single-stream single-band AR9300.
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such that we get decent performance out of them.
ok jsg@
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the same scheme as the MCP79 ones. This is a guess, but it matches the changes
the were made before, and ID 0x0d85 defenitely is in SATA mode.
ok jsg@
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Tested by Frans Haarman <franshaarman at gmail.com>
ok jsg@
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From Jeremy Chase.
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to the maximum value to reduce the number of low latency interrupts
hitting the card when the ring is getting full.
Tested at least by deraadt@ on 99 and myself on 99 and 98 ix(4).
OK mikeb@
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ok oga@
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