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path: root/sys/dev/pci
AgeCommit message (Collapse)Author
2005-07-09remove code for TX checksumBrad Smith
2005-07-09don't clear RUNNING here.Brad Smith
2005-07-09remove braces hereBrad Smith
2005-07-09betterBrad Smith
2005-07-09- mbuf external storage is of (caddr_t), not (caddr_t *).Brad Smith
- simplify code a bit and use MEXTADD macro.
2005-07-09handle 64bit bar; found by mpf@Michael Shalayeff
2005-07-09fix SIOCSIFMTUBrad Smith
2005-07-09- disable TX checksum offload since this chip has a bug whereBrad Smith
it'll wedge if you try to transmit a Jumbo frame larger than 8152 bytes. - Rip out VLAN stripping support. From camiel@ - Only set Ok flags for receive checksum offload otherwise fallback on software.
2005-07-09Missing pciide_print_modes() in pdc203xx_setup_channel(). fgsch@ ok.Hakan Olsson
2005-07-08- use ETHER_MAX_LEN_JUMBO in one more spotBrad Smith
- don't bother setting bad checksum flag, fallback on software
2005-07-08add a return here.Brad Smith
2005-07-07check ETHERMIN and stop calling em_init_locked() from SIOCSIFMTU ioctl.Brad Smith
2005-07-07Make Fractional T1 work, reported and tested by Greg Mortensen,Can Erkin Acar
patch from alex@
2005-07-07- the PCI layer enables bus mastering so don't bother again here.Brad Smith
- use pci_mapreg_map()
2005-07-07remove unused structure definitions. ok damien@Kevin Lo
2005-07-06regenJonathan Gray
2005-07-06More NVIDIA devices, in a dmesg from tybollt at solace.mh.seJonathan Gray
2005-07-06- Rewritten TX to use only two pointers to track producer/consumer.Brad Smith
- Bugfix: don't forget to set IFF_OACTIVE when TX list is full. From FreeBSD - clear IFF_RUNNING & IFF_OACTIVE in vr_stop() before de-allocating resources. Thanks to cloder@, millert@ and pedro@ for testing.
2005-07-06smartarray 5* raid controller; does io but needs more work; commented out in ↵Michael Shalayeff
configs for now
2005-07-06allow bge(4) to receive Jumbos by default.Brad Smith
ok krw@
2005-07-06regenBrad Smith
2005-07-06add Intergraph Intense 3DBrad Smith
2005-07-03include CRCBrad Smith
2005-07-03fix MTU ioctl caseBrad Smith
2005-07-03no need for HW VLAN tag removal so clean up some code.Brad Smith
2005-07-03enable use of the hardware 64 entry CAM table for perfect multicastBrad Smith
filtering otherwise fallback on the multicast hash table if trying to filter on more than 64 addresses or if we're trying to flip on ALLMULTI.
2005-07-03ETHERMTU_JUMBO -> ETHER_MAX_LEN_JUMBOBrad Smith
2005-07-03adjust tuneable for Jumbo caseBrad Smith
2005-07-03regenBrad Smith
2005-07-03GT -> GT AGPBrad Smith
2005-07-03- when printing the "unsupported chip revision" message also print theBrad Smith
chip revision. - allow VLAN-sized frames even when not using hardware VLAN support. From FreeBSD - disestablish PCI interrupt on failure to attach. - allow reception of Jumbo frames by default. Based on a diff sent to me a long time ago by mcbride@
2005-07-03regenBrad Smith
2005-07-03add GeForce 6600 GTBrad Smith
From: Chuck Gagnon <gagnocg at mac dot com>
2005-07-02clear IFF_RUNNING & IFF_OACTIVE in foo_stop() before de-allocating resources.Brad Smith
2005-07-02add TLPHY_MEDIA_NO_10_T flag for DP4000 modelBrad Smith
2005-07-02- mbuf external storage is of (caddr_t), not (caddr_t *).Brad Smith
- check for MTU being too small with ETHERMIN - don't bother reseting the card since it'll default to allowing Jumbos
2005-07-02de-static and we don't need to enable bus mastering hereBrad Smith
2005-07-02syncTheo de Raadt
2005-07-02shortenTheo de Raadt
2005-07-02clear IFF_RUNNING & IFF_OACTIVE in stge_stop() before de-allocating resourcesBrad Smith
2005-07-02add support for PCI-E 5752 core and recognize a few additionalBrad Smith
5750 revisions. Info from the Broadcom Linux driver
2005-07-01revert rev 1.59Brad Smith
2005-07-01enable RX HW checksum offloadBrad Smith
2005-06-30syncTheo de Raadt
2005-06-30Sun Expert3D cardsTheo de Raadt
2005-06-30syncTheo de Raadt
2005-06-30update VIA parts based on new docsTheo de Raadt
2005-06-29volatile hereBrad Smith
2005-06-29rev 1.25Brad Smith
* Add workaround for revision Bx bcm5700: chip bugs in decoding of PCI register writes may leave the hardware in (partial) powersave state, such that writes to "indirect" registers do not work. Explicitly force chip into D0 state at attach time. From NetBSD
2005-06-29add some Power Management constantsBrad Smith
From NetBSD