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path: root/sys/dev/pci
AgeCommit message (Expand)Author
2007-04-27only attach nx NICs with 128MB memory and a 32bit memory type for nowReyk Floeter
2007-04-27rename sc_io* types to sc_mem* to reflect the bus space memory type.Reyk Floeter
2007-04-27add NX_DEBUG macrosReyk Floeter
2007-04-27add a section to define the nx memory layoutReyk Floeter
2007-04-27Fix copy/paste-o in offset of TDINTCM register jointly spotted by dlg andChad Loder
2007-04-27my txt fifo write bug is extremely strange. i need a delay before theDavid Gwynne
2007-04-26add a comment that NetXen provided hardware and documentation to makeReyk Floeter
2007-04-26syncMichael Knudsen
2007-04-26Add a bunch of nvidia pci ids from The Linux PCI ID Repository inspiredMichael Knudsen
2007-04-26Some cleanup, ansify remaining K&R functions, neatly summarize theGordon Willem Klok
2007-04-25hook the rx path up.David Gwynne
2007-04-25add some dprintfs to the fifo handlers.David Gwynne
2007-04-25when populating the rxf fifo, actually sync the rxf fifo at the start andDavid Gwynne
2007-04-25we only have to mask interrupts once when we bring the interface downDavid Gwynne
2007-04-25i got a reg init wrong, still no tx completion though.David Gwynne
2007-04-25enable tx completion interrupts and provide handling for them.David Gwynne
2007-04-25fix a dprintf in the debug pathDavid Gwynne
2007-04-25more register init in tht_upDavid Gwynne
2007-04-25put a two second timeout on the chip init after the firmware is loadedDavid Gwynne
2007-04-25shift some bits like the spec says i should.David Gwynne
2007-04-25format string fixDavid Gwynne
2007-04-25add some debug to the tx paths so i can see packets go on and off the hw.David Gwynne
2007-04-25fix the conditions that the tx free path keeps looping on so that it willDavid Gwynne
2007-04-25configure the 10G mac and enable (more) interrupts when the interface isDavid Gwynne
2007-04-25split tht_fifo_ready into tht_fifo_writable and tht_fifo_readable. the wayDavid Gwynne
2007-04-25start implementing interrupt handling.David Gwynne
2007-04-25add more register definitions, in particular the interrupt ones.David Gwynne
2007-04-25im an idiot. for (;;) { } while (condition); loops forever, no matter whatDavid Gwynne
2007-04-25add some debug goo to be used soonDavid Gwynne
2007-04-24do not use static function declarations in kernel drivers (noReyk Floeter
2007-04-24use the fifos ready byte counter in the firmware loading.David Gwynne
2007-04-23increment opackets and ipackets. clear OACTIVE when tx completes.David Gwynne
2007-04-23spelling in comment fix.David Gwynne
2007-04-23when we use a fifo we always seem to need to know how much of the fifo isDavid Gwynne
2007-04-23replace the code in the rxf and txt fifo handlers that loads the dmaDavid Gwynne
2007-04-23add tht_write_dmap, and tht_write_pad.David Gwynne
2007-04-22this is my previous commit again, but this time it was tested.David Gwynne
2007-04-22process the tx free queue. this indicates when transmitted packets haveDavid Gwynne
2007-04-22Correct offsets for Tx completion regs.Mark Kettenis
2007-04-22this is the start of the transmit path. this takes packets off theDavid Gwynne
2007-04-22only printf if the firmware load failed.David Gwynne
2007-04-22mark the ccb used for error handling as complete when it completes. thisDavid Gwynne
2007-04-22unload the dmamap of the ccb used in ncq error handling once we've finishedDavid Gwynne
2007-04-22hookup bpf. this pushes packets along bpf on the rx side. i need to writeDavid Gwynne
2007-04-22start implementing processing of the rx descriptor fifo. this is the oneDavid Gwynne
2007-04-22i seem to be having lots of trouble with writing bus_dmamap_sync callsDavid Gwynne
2007-04-22macros for accessing bits of the rx descriptorsDavid Gwynne
2007-04-22prettier debug, if it is ever re-enabled, ok dlgTheo de Raadt
2007-04-21disable ahci debug output. ahci is working on the majority of chipsets,David Gwynne
2007-04-21backout: compile before you commit, pleaseTheo de Raadt