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Found by LLVM/Clang Static Analyzer.
ok henning@ krw@ claudio@
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ok claudio@
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Arrandale (on laptop i3 and i5) was already doing this, but Clarkdale (the
desktop chipsets) wasn't. This gives mikeb@'s desktop a chance to get the video
back on resume.
While here, remove the vendor/subvendor ids from the Arrandale entry.
Just because someone doesn't have the same laptops as tested doesn't
mean inteldrm magically has the ability to restore the graphics chip.
This is possible to do without repost but fiddly and will take me a
while to sort out, so just repost the whole sodding lot for now.
ok ketteis@, deraadt@, mikeb@
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when leaving. when you're handling an interrupt it is masked.
whacking the chip is work for no gain.
modify the interrupt handler so it only processes the rings once,
rather than looping over them until it runs out of work to do.
looping in the isr is bad for several reasons:
firstly, the chip does interrupt mitigation so you have a
decent/predictable amount of work to do in the isr. your first loop
will do that chunk of work (ie, it pulls off 50ish packets), and
then the successive looping aggressively pull one or two packets
off the rx ring. these extra loops work against the benefit that
interrupt mitigation provides.
bus space reads are slow. we should avoid doing them where possible
(but we should always do them when necessary).
doing the loop 5 times per isr works against the mclgeti semantics.
it knows a nic is busy and therefore needs more rx descriptors by
watching to see when the nic uses all of its descriptors between
interrupts. if we're aggressively pulling packets off by looping
in the isr then we're skewing this check.
ok henning@ krw@
testing by sthen@
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Synchronization operations are expressed from the perspective of the host
RAM, e.g., a device -> memory operation is a READ and a memory -> device
operation is a WRITE.
the status block that the isr reads is written to by the device.
the chip writes to memory, it is therefore a READ.
this also adds the preread sync when the map is set up and the postread
sync when the map is torn down for better symmetry. there are probably
more issues like this in the code, but this is a start.
discovered while discussing another diff with claudio@
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rather than looping over them until it runs out of work to do.
looping in the isr is bad for several reasons:
firstly, the chip does interrupt mitigation so you have a
decent/predictable amount of work to do in the isr. your first loop
will do that chunk of work (ie, it pulls off 50ish packets), and
then the successive looping aggressively pull one or two packets
off the rx ring. these extra loops work against the benefit that
interrupt mitigation provides.
bus space reads are slow. we should avoid doing them where possible
(but we should always do them when necessary).
doing the loop 5 times per isr works against the mclgeti semantics.
it knows a nic is busy and therefore needs more rx descriptors by
watching to see when the nic uses all of its descriptors between
interrupts. if we're aggressively pulling packets off by looping
in the isr then we're skewing this check.
ok deraadt@ claudio@
this is like src/sys/dev/pci/if_ix.c r1.50.
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than looping over them until it runs out of work to do.
in my testing i have found that under what i consider high pps
(>160kpps) ix would loop 4 or 5 times in the interrupt handler,
where each loop does a bus_space_read and the mclgeti loop (ie, rx
dequeue followed by rx ring fill).
looping in the isr is bad for several reasons:
firstly, the chip does interrupt mitigation so you have a
decent/predictable amount of work to do in the isr. your first loop
will do that chunk of work (ie, it pulls off 50ish packets), and
then the successive looping aggressively pull one or two packets
off the rx ring. these extra loops work against the benefit that
interrupt mitigation provides.
bus space reads are slow. we should avoid doing them where possible
(but we should always do them when necessary).
doing the loop 5 times per isr works against the mclgeti semantics.
it knows a nic is busy and therefore needs more rx descriptors by
watching to see when the nic uses all of its descriptors between
interrupts. if we're aggressively pulling packets off by looping
in the isr then we're skewing this check.
ok deraadt@ claudio@
testing by phessler@ bluhm@ and me in production
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some broken intel chipsets that require longer delays, we will cope with
that later hopefully.
ok kettenis
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Pluses:
- Add support SMBus for VT82C596, VT82C596B, VT82C686A, VT8231
- Add support ACPI timer for all VIA South Bridges
ok deraadt@, tested sthen@
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detach happens after the hardware is gone, so don't try to touch
the hardware in the detach path
but azalia_pci_detach is called if the device coiuld not be initialized.
in that case, shut the hardware down.
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by claudio to be related to this commit) until jakemsr has time to fix it
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ok matthew@ tedu@, also eyeballed by at least krw@ oga@ kettenis@ jsg@
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ITExpress chipsets. (similar to 1.243, with a deja vu)
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scheduled better, ioctl paths are more reliable, and it removes NO_CCB.
ok krw@
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and it does not exist at all on newer hardware so only map
it on those types we are interested in.
Fixes "PRO/1000 PT (82575EB)" for Sylvain Desveaux and will
also be required for at least 82580.
ok claudio@
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ok claudio krw
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the caller and the function that the function will not fail to allocate
memory and return a NULL pointer. However, m_dup_pkthdr() violates
this contract, making it possible for functions that pass M_WAITOK to
be surprised in ways that hurt.
Fix this by passing the wait flag all the way down the functions that
actually do the allocation for m_dup_pkthdr() so that we won't be
surprised.
man page update forthcoming
ok claudio@
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the hardware in the detach path
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up. From FreeBSD.
ok jsg claudio
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memory used for i/o.
ok dlg@ deraadt@
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ok claudio@
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Both found by miod@
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This allows bce to run properly on systems with more then 1G of
physical memory. It also makes the driver a lot simpler since the
DMA rings are now mostly static.
bce is short for bcopy ethernet.
OK dlg@, just commit it deraadt@
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work (they send big buffers to devices and expect less so they dont have
to do two ops for one read), and would make lun probes work again, etc.
based on the solaris code supplied by lsi.
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ok deraadt@
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ok deraadt@
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ok deraadt@
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from Anton Maksimenkov
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ok deraadt
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ok deraadt
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a global em_display_debug_stats variable.
OK mcbride, matthew, deraadt, henning.
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azalia_configure_pci(). use that function in azalia_attach() and
azalia_resume(). fixes post-resume "static" during playback for
some machines with ATI chipsets.
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in pxe.h.
ok deraadt@ sthen@
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the bus, not which bioctl volume id it is.
ok mikeb@ krw@ miod@
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detaching from the bus on some of the machines.
tested by many, ok miod@
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well as < the array length.
ok kettenis@, mikeb@ (who suggested the same fix) and marco@.
"get that fixed" deraadt@.
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most of the work and bug fixes were done by mikeb@, i put it in ioctl
form.
ok mikeb@ and miod@
tested by me
an earlier revision was tested by Åukasz Czarniecki who also reported
the problem in the first place.
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tested by Gabriel Linder, ok kevlo, miod
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valid connection and a valid converter. fixes speaker auto-mute
for some IDT codecs.
ok miod@
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number of widget connection list entries. if the high bit is set in
a connection list entry, all widgets between the previous and current
entry are connected. go through the connection list entry once to
figure out how many connections there are, then go through it again
to build the connection list.
ok miod@
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