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2013-01-18Clean up and rework workunit completion for concat. Ensure that we removeJoel Sing
the workunit from the pending queue and restart deferred workunits, even in error conditions. ok krw@
2013-01-18Reset I/O counters when releasing ccbs.Joel Sing
ok krw@
2013-01-17Don't try to access m_head after it may be freed (unlikely for VT6105M,Chris Cappuccio
but possible). Also don't re-calculate vlan tag repeatedly through the descriptor loop. ok dtucker@
2013-01-17syncReyk Floeter
2013-01-17Add a few more VMware devices.Reyk Floeter
2013-01-17forgot this file when committing the 64bit dva diff.David Gwynne
2013-01-17Convert softraid RAID 0 to the new ccb functions.Joel Sing
ok krw@
2013-01-17Restructure the RAID1 I/O path so that we only get a ccb once we areJoel Sing
certain that we need one. Also make code more consistent with other disciplines. ok krw@
2013-01-17mikeb pointed at that the interrupt status register read in mpi_intr wasDavid Gwynne
important, as per r1.167.
2013-01-17we dont need to read the interrupt status register to know if we haveDavid Gwynne
any work to do in the interrupt handler, or to clear it. the relevant bits indicate whether there's work on the doorbell and clear when there isnt. we need to read the doorbell if there is work to do, so lets just go that straight away anyway. get rid of bus_space_barriers in the io path. barriers are for enforcing ordering. the doorbell reads and writes dont depend on any other register values so ordering isnt applicable here.
2013-01-17Convert softraid concat to the new ccb functions.Joel Sing
ok krw@
2013-01-17treat DVAs as 64bits all the time so we can avoid ugly casts and shifts inDavid Gwynne
the code.
2013-01-17Add a hibernate HIB_DONE op. After the memory-side-effect driver finishesTheo de Raadt
IO to the disk, DVACT_RESUME the controller back to normal operation. That allows us to do the full DVACT_POWERDOWN sequence afterwards. ok mlarkin
2013-01-17first or second coming, commie or not commie, one m in coming is sufficientHenning Brauer
ok claudio
2013-01-17Force the latest 3 generations of Intel SATA chipsets into AHCI mode.Claudio Jeker
This makes MacBook Pro with bootcamp more happy to run OpenBSD since by default it boots up with IDE mode enabled on those chips which results in all sorts of troubles with the at least the DVD drive. With and OK kettenis@
2013-01-16Fight global eye bleeding by fixing evil typos.Miod Vallat
2013-01-16Consistently call sr_scsi_done instead of scsi_done.Joel Sing
ok krw@
2013-01-16Loongson: add throttling support.Paul Irofti
This commit allows CPU throttling on the 2F systems. Inspired by an old diff from otto@. Help from and okay miod@.
2013-01-16Add a function that handles the completion of a ccb.Joel Sing
ok krw@
2013-01-16Add a new capability flag to identify disciplines where read failures areJoel Sing
not necessarily terminal (i.e. we have redundancy). ok krw@
2013-01-16Set resid to zero if the scsi transfer completed without error.Joel Sing
ok krw@
2013-01-16Factor out code used to release ccbs from a workunit.Joel Sing
ok krw@
2013-01-16regenBrad Smith
2013-01-16Some corrections for D-Link device names.Brad Smith
ok jsing@
2013-01-16fix typo in commentDarren Tucker
2013-01-16Add hardware VLAN tag/untag support for VT6105M chips. Help/feedback/okDarren Tucker
brad@ chris@ jsing@ kettenis@ mikeb@ sthen@
2013-01-16Sort the PCI ids.Brad Smith
ok dtucker@ jsing@
2013-01-16Add hardware VLAN tag/untag support for VT6105M chips. Help/feedback/okDarren Tucker
brad@ chris@ jsing@ kettenis@ mikeb@ sthen@
2013-01-16regenBrad Smith
2013-01-16Add D-Link DFE-520TX C1Brad Smith
2013-01-16Keep a count of packets added to the chip's TX queue and only poke the chipDarren Tucker
if we've added a packet. Reduces CPU util a tiny bit. ok brad@ jsing@
2013-01-15More syncing with FreeBSD bge version. No binary change.Claudio Jeker
2013-01-15Implement a function that gets and correctly initialises a ccb for I/O,Joel Sing
along with a function that enqueues a ccb on a workunit. ok krw@
2013-01-15Always initialise the discipline name, not just when we are doing a create.Joel Sing
2013-01-15Fix typos in comments and change the syntactic sugar of a function toClaudio Jeker
reduce the diff between Fx and Ox. OK gcc
2013-01-15put a tab after #define to make the diff between Fx and Ox smaller.Claudio Jeker
No binary change.
2013-01-15Keep a function pointer to the per-discipline I/O interrupt handler in theJoel Sing
discipline data structure. To be used with an upcoming diff.
2013-01-15dont use amd64 is currently broken cos it has noDavid Gwynne
bus_space_write_raw_region_8. disabling it for now.
2013-01-15Factor out workunit initialisation code.Joel Sing
ok krw@
2013-01-15use bus_space_write_raw_region_8 on 64bit archs when writing to the ringsDavid Gwynne
2013-01-14map the registers PREFETCHABLE so things that can do write combining canDavid Gwynne
try and do write combining like the myx doco likes.
2013-01-14avoid extra bus_space barriers in the interrupt handler.David Gwynne
2013-01-14use one interrupt handler for the thtc headend, rather than seperateTheo de Raadt
interrupt handlers for the ports. this ensures that the 2nd port does not get starved. ok dlg
2013-01-14Loongson: Replace the system clock provided by the CPU with a GLX MFGPT.Paul Irofti
CPU throttling was not possible due to the fact that the system clock was the CPU clock. So slowing down the CPU would also slow down the passing of time. This commit adds a driver for the MFGPT1 clock from the AMD companion chip found on lemote and hooks it up as the system clock. It also changes the frequency value of hz from the default, which was 100, to 128. That's because the scaling on MFGPT clocks is represented by powers of two. Okay miod@.
2013-01-14Fix the sotfware.Joel Sing
2013-01-14Call the correct callback on node disassociation.Joel Sing
2013-01-14when posting descriptors to the chips rings, avoid going write barrierDavid Gwynne
write barrier write barrier when using myx_write to post descriptors. instead let its go write write write barrier by using the appropriate bus_space write directly followed by a single bus_space barrier. the story above is mostly true, except that myx wants use to write all the descriptors except the first, barrier, and then write the first one out to signale that the chip can proceed. it is also worth noting that the barriers cover more address space than what we actually wrote to. this makes the code much simpler, and avoids generating extra fence operations (which is what barrier functions end up as on most of our archs) when we wrap around the end of the ring. the bus_space doco encourages this. bus_space use was discussed with krw@ kettenis@ deraadt@
2013-01-14the myri doco suggests its nice to post stuff by filling in everythingDavid Gwynne
in the rings except the first descriptor. once you've written as much as you can out, then you go back and post the first descriptor to signal that the chip should go ahead and work.
2013-01-14;; is a long way of saying ;David Gwynne
2013-01-13Enable flow control support with 5708S/5709S adapters.Brad Smith
ok dlg@