| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2018-04-07 | em: Increase delay after reset to 20ms | Stefan Fritsch | |
| This is the value in freebsd for ich8lan. ok mikeb@ jsg@ | |||
| 2018-04-07 | em: Print error code and phy/mac type | Stefan Fritsch | |
| Print the error code if hardware initialization failed. If EM_DEBUG is defined, print the phy/mac type during attach. ok mikeb@ jsg@ | |||
| 2018-04-06 | If port io is disabled, disable the associated windows as well. | Mark Kettenis | |
| ok patrick@, deraadt@ | |||
| 2018-04-05 | Add more initialization code such that things work with the EDK2-based | Mark Kettenis | |
| UEFI firmware as well. | |||
| 2018-04-05 | typo in printf - was _PRO, should be _PR0 | Mike Larkin | |
| ok kettenis | |||
| 2018-04-03 | regen | Mark Kettenis | |
| 2018-04-03 | Add Marvell ARMADA 7K/8K (CP110) Root Complex. | Mark Kettenis | |
| 2018-04-03 | Match on the more specific "marvell,armada8k-pcie" instead of the generic | Mark Kettenis | |
| "snps,dw-pcie" for now. There are considerable variations between implementations of the Synapsys Designware PCIe core and glue logic and the current code isn't flexible enough to deal with that yet. | |||
| 2018-04-02 | Add mvrng(4), a driver for the random number generator on the Marvell Armada | Mark Kettenis | |
| 7K & 8K SoCs. | |||
| 2018-04-02 | Attach fec(4) to i.MX8M as well. | Patrick Wildt | |
| 2018-04-02 | Attach imxiomuxc(4) to i.MX8M as well. | Patrick Wildt | |
| 2018-04-02 | Move imxiomuxc(4) to sys/dev/fdt. | Patrick Wildt | |
| 2018-04-02 | Implement a regmap lookup by compatible since unfortunately not all | Patrick Wildt | |
| regmaps are referenced by nodes or phandles. ok kettenis@ | |||
| 2018-04-02 | Move fec(4) to sys/dev/fdt. | Patrick Wildt | |
| 2018-04-02 | Move imxccm(4) to sys/dev/fdt. | Patrick Wildt | |
| 2018-04-02 | Add dwpcie(4), a (minimal) driver for the Synopsys Designware PCIe core in | Mark Kettenis | |
| Root Complex mode. In its current state it probably only works on the Marvell Armada 7K and 8K SoCs, but the same core is used on many other cores as well. | |||
| 2018-04-02 | Add dwpcie(4), a (minimal) driver for the Synopsys Designware PCIe core in | Mark Kettenis | |
| Root Complex mode. In its current state it probably only works on the Marvell Armada 7K and 8K SoCs, but the same core is used on many other cores as well. | |||
| 2018-04-02 | enable snooping on Intel Apollo Lake HD Audio, pt out & ok jsg | Henning Brauer | |
| 2018-04-02 | attach on Intel Apollo Lake SMBus, ok jsg | Henning Brauer | |
| 2018-04-02 | regen | Henning Brauer | |
| 2018-04-02 | add a bunch of Intel Apollo Lake devices found on NUC6CAYH / Celeron J3455 | Henning Brauer | |
| input & ok jsg | |||
| 2018-04-02 | Add support for register shift/io-width. This allows us to support UARTs | Mark Kettenis | |
| that are mostly NS16550 compatible but use 32-bit instead of 8-bit registers such as the Synopsys Designware UARTs found on many armv7, arm64 and amd64 SoCs. tested by florian@, blum@ ok deraadt@ | |||
| 2018-03-31 | Add mvtemp(4), a driver for the temperature sensors found on Marvell Armada | Mark Kettenis | |
| SoCs. | |||
| 2018-03-30 | Move imxanatop(4) to sys/dev/fdt. | Patrick Wildt | |
| 2018-03-30 | Move imxiic(4) to sys/dev/fdt. | Patrick Wildt | |
| 2018-03-30 | Attach imxesdhc(4) to i.MX8M as well. | Patrick Wildt | |
| 2018-03-30 | Move imxesdhc(4) to sys/dev/fdt. | Patrick Wildt | |
| 2018-03-30 | Move imxgpio(4) to sys/dev/fdt so it can be shared between arm64 and armv7. | Patrick Wildt | |
| 2018-03-30 | Attach imxgpc(4) to i.MX8M as well. | Patrick Wildt | |
| ok kettenis@ | |||
| 2018-03-30 | Move imxgpc(4) to sys/dev/fdt so it can be shared between arm64 and armv7. | Patrick Wildt | |
| ok kettenis@ | |||
| 2018-03-30 | Add some sensible error checking in the hibernate io path, helpfully | Jonathan Matthew | |
| suggested by coverity (via daniel@) | |||
| 2018-03-29 | Move imxuart(4) to sys/dev/fdt so it can be shared between arm64 and armv7. | Patrick Wildt | |
| Discussed with kettenis@ | |||
| 2018-03-29 | Add mvrtc(4), a driver for the RTC integrated on various Marvell Armada SoCs. | Mark Kettenis | |
| 2018-03-29 | Use "marvell,spi-ranges" property to map GICP interrupts numbers into GIC | Mark Kettenis | |
| SPI numbers. Makes higher numbered GICP interrupts actually work. | |||
| 2018-03-29 | Add support for legacy binding used in device trees for Marvell devices for | Mark Kettenis | |
| USB PHY support and add support for "usb-nop-xceiv" PHYs. ok patrick@, jsg@ | |||
| 2018-03-28 | Configure tx and rx chain delay based on device tree properties. | Mark Kettenis | |
| ok mlarkin@ | |||
| 2018-03-28 | drm/edid: set ELD connector type in drm_edid_to_eld() | Jonathan Gray | |
| From Jani Nikula b59718a13495d420491fa86f915273066d89fcab in linux 4.4.y/4.4.123 1d1c36650752b7fb81cee515a9bba4131cac4b7c in mainline linux | |||
| 2018-03-28 | drm: Defer disabling the vblank IRQ until the next interrupt (for instant-off) | Jonathan Gray | |
| From Chris Wilson 1b3ec39d3b6d1d252e03a86fcdcc8f8a2970258e in linux 4.4.y/4.4.123 608b20506941969ea30d8c08dc9ae02bb87dbf7d in mainline linux | |||
| 2018-03-27 | Add acpicmos(4), a driver that implements SystemCMOS OperationRegion | Mark Kettenis | |
| access support. This fixes machines where the AML doesn't check whether support for this OperationRegion type has been registered by the OS. ok mlarkin@ | |||
| 2018-03-21 | Add mvicu(4), a driver for the Interrupt Consolidation Unit found on | Mark Kettenis | |
| Marvell Armada 7K and 8K SoCs. ok patrick@ | |||
| 2018-03-21 | Add support for Marvell Armada 7K and 8K SoCs. | Mark Kettenis | |
| ok patrick@, visa@ | |||
| 2018-03-21 | Register regmap regardless of whether the node has a "phandle" property. | Mark Kettenis | |
| ok patrick@, visa@ | |||
| 2018-03-21 | Fix the way we detect xrun on the recording end, which may prevent the | Alexandre Ratchov | |
| ring read pointer from wrapping, in turn allowing the process to read past the ring boundaries. ok deraadt@ | |||
| 2018-03-20 | Add mvgpio(4), a driver to handle GPIOs on Marvell SoCs. | Mark Kettenis | |
| 2018-03-20 | sync | Kevin Lo | |
| 2018-03-20 | Add support for SIMCom SIM7600E. | Kevin Lo | |
| ok deraadt@ | |||
| 2018-03-20 | Add hibernate IO path for sdmmc(4). This requires some help from the | Jonathan Matthew | |
| sdmmc chipset driver, currently only implemented in sdhc(4), but mostly uses the regular path. sdhc(4) also needed the ability to perform IO while cold. ok deraadt@ | |||
| 2018-03-19 | Make it possible for the sdhc(4) attachment glue to specify the base clock | Mark Kettenis | |
| frequency. ok patrick@, visa@ | |||
| 2018-03-19 | Use a table that is automatically generated from data extracted from the | Mark Kettenis | |
| Linux kernel for encoding pin functions. ok patrick@ | |||
| 2018-03-19 | Switch mvpinctrl(4) from a last match to first match principle. This is | Patrick Wildt | |
| needed as the full configuration table for an SoC can specify a function (maybe erroneously) more than once, and the tables are designed so that the first match counts. This is in preparation for a followup diff that makes use of the full table. ok kettenis@ | |||
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