Age | Commit message (Collapse) | Author |
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duplex state. this will actually enable duplex reporting for drivers
using the mii layer.
figured out by Moritz Grimm with sk(4)
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looking at SK_STAT_BMU_PUTIDX; makes Yukon-2 XL rev. A3 work.
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only checking for __STRICT_ALIGNMENT; tested on i386 and alpha
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domain number such that we can distinguish between busses with the same bus
number that are behind different host bridges. Domains can be accessed by
using different device nodes.
ok deraadt@
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type. this would cause us some more trouble with WME which isn't
supported yet...
thanks to Nick Kossifidis
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doing nothing and the mi code does not use it anymore anyway. No functional
change.
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diff from Sepherosa Ziehau (DragonFly); The firmware TIM element template
was initialized wrong.
Though, our ieee80211_alloc_beacon() routine calculates it's own TIM
element, which now results in having two TIMs in an acx(4) beacon.
Would it be an idea to introduce a ieee80211_alloc_beacon() flag to
turn the TIM element off? Because fiddling out the TIM element in the
driver for cases in which the firmware calculates its own TIM is
a bit ugly ...
ok claudio@
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in a much more recent Marvell Linux sk98lin driver.
From brad@.
ok me and kettenis (via mglocker)
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While there, fix a typo.
ok gwk
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- change the defs of LHS, RHS, DST and DST2 to be AML_*.
Noted by Marco S Hyman on misc@, these allow ACPI to be compiled into
RAMDISK kernels. Suggestion for AML_ rename (to avoid name clash with
TIMEZONE's DST, which was noted by someone else a while ago, but I
forget who) from jordan@.
ok marco@, jordan@
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hardware checksum could be mangled with 28 byte or less IP packets.
>From tsutsui@NetBSD
Tested by otto@ brad@ and Han Boetes <han at mijncomputer dot nl>
Tested by maja@ with the 8139C+ chipset
Tested on amd64/i386/sparc64
ok mglocker@ brad@ otto@
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-- bus_space(9) does the endian switch for us -- and finaly change one
letoh32() to letoh16(). The last one being by far the nastiest one.
OK mglocker@
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drop it. im guessing at some point we'll want to use each port, knowing
where they are can help.
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ahci_port structs for it.
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ccb lists. this is missing handling of the dmamem each port needs to
manage, but that can wait till i figure out how it fits together. insane
stuff.
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and ahci_pwrite. these will use an io handle into a window of the
controllers register space that can be created with bus_space_subregion,
and which is stored in the ahci_port struct.
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per port rather than as a big list for the whole controller. the softc
has an array of pointers to a struct that manages all the shizz relevant to
a particular port. when we map the controllers ports, we'll allocate these
as needed.
if the port isnt implemented, we leave its pointer in the softc null and
use that to decide if a drive might be there or not, rather than lookup up
the PI register all the time. a comparison has to null has to be cheaper
than doing bit operations, surely.
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deraadt@
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inetrrupt routing information.
ok deraadt@
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than fall through to the bits that do cleanup when an error occurs.
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to address. instead make them simply offsets from the start of a ports
register space, which is something we can easily set up with
bus_space_subregion. this should make the code a lot easier to read later
on.
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mechanism to figure out if a port is usable or not later on.
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this stuff isnt endearing me to ata at all, and apparently ahci is a good
ata controller. the command path looks way more complicated than it needs
to be (or maybe i am used to really good scsi controllers, i dont know). a
lot of the terminology seems annoyingly different just for the sake of
being different. i mean, what is the advantage of calling a scatter gather
lement a "physical region descriptor table"? noone else calls it that.
there's a lot of weird stuff in here.
blah.
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arc, which got it from mpi, which got it from ami. grange is right, we
should look at pushing it back up into the bus_dma api somewhere.
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debug is on
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this also fixes a few reg definition errors i found after having them
dumped.
something seems really screwy with %b. i cant select the 32nd bit position
using \x20 or \040, so im using \32 and the rest are octal (\oNN). hex
(\xNN) seems really really borked, and the compiler doesnt like eating some
of the dec ones (eg, \8BITNAME).
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