Age | Commit message (Collapse) | Author |
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Tested by serveral people. ok millert@, mickey@
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Possibloe fix for some bge chip revisions taking a long time to reset
(e.g., polling for a half-second or more at splnet(), blocking most
interrupts, durin an ifconfig down/ifconfig up).
Appears to help for a 5704C rev A3, which is the only chip I've
ever seen that had even a mild version of the reported problem.
rev 1.61
Check for BGE_PCI_PCISTATE register failing to revert on reset.
if it occurs, print a message indicating why the reset took so long.
From NetBSD
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From FreeBSD
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* Set buffer management high water marks for MTU > 1514.
* Set BGE_MAX_RX_FRAME_LOWAT (from Linux driver).
rev 1.25
* Update onchip buffer tunables to recommended values from Linux drivers.
* Increase Tx interrupt-coalescing thresholds, to reduce Tx-done interrupts.
From NetBSD
ok krw@
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callback is made.
From NetBSD
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(sk_vpd_readonly) is not currently used, but the memory being tromped
on might be.
ok millert@.
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by mcbride, reduces size of the kernel
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didn't manifest on i386 for some reason.
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functions, and ultra-conservative calculations, to avoid possible
overflow issues. Also consistant with values passed in scsi requests.
Whitespace and comment tweaks.
Update FreeBSD tags now that we are sync'd to the latest version.
From FreeBSD aic79xx.c r1.33, aic79xx.h r1.23, aic_osm_lib.h r1.4.
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Based on NetBSD driver
ok krw@
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however a correct clean way to do this should be found
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something better and more flexible to use.
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except printing the ASIC model and rev in dmesg. will be used
instead of checking ASIC revs all over the place.
From NetBSD
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- don't call re_rxeof unneededly twice in some cases, from
FreeBSD prodded by brad
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When stopping the various functional blocks of the chip, clear the
bit and then read it back in a loop (with appropriate delays) waiting
for it to read back clear.
This fixes a problem where the bus would hang when bringing down
the interface or changing interface flags on a system with a
sufficiently fast CPU (e.g. 2GHz P4 Xeon).
From NetBSD
ok krw@
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When reading PHY regs over the i2c bus, the turnaround ACK bit
is read one clock edge too late. This bit is driven low by
slave (as any other input data bits from slave) when the clock
is LOW. The current code did read the bit after the clock was
driven high again.
From FreeBSD
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the driver to issue a bus reset more quickly than intended. We want to
wait if we find another SCB that could be the cause of this timeout,
not proceed to a bus reset.
This code is currently inside an #ifdef 0/#endif pair.
From FreeBSD aic79xx.c r1.32.
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by a transaction performing a driver handled message sequence (an scb
with the MK_MESSAGE flag set). Full details on changes in FreeBSD
commit message.
From FreeBSD aic79xx.c r1.30, using microcode generated from just
committed new source.
Tested in August by marco@.
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From FreeBSD aic79xx.reg r1.18 and aic79xx.seq r1.17.
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to close the 'busfree during non-packetized phase' hole.
From FreeBSD aic79xx_pci.c r1.20.
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From FreeBSD aic79xx.h r1.20 and aic79xx.c r1.30.
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Put some delay in the loops that poll for MII transaction
completion. Without this, reading the PHY can hang the bus
on a sufficiently fast CPU.
From NetBSD
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From FreeBSD aic79xx_inline.h r1.16.
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2) Create tx_map's large enough to map jumbo buffers.
3) Set length of jumbo frame to BGE_JLEN rather than ETHER_MAX_DIX_LEN.
4) Activate jumbo rx ring when MTU changed. (From FreeBSD).
Makes jumbo frames work on bge.
ok brad@.
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