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* Add workaround for revision Bx bcm5700: chip bugs in decoding
of PCI register writes may leave the hardware in (partial) powersave state,
such that writes to "indirect" registers do not work.
Explicitly force chip into D0 state at attach time.
From NetBSD
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From NetBSD
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and
rev 1.25
* bcm5700 chips rev Bx wedge up if given DMA descriptors of
eight bytes or less. Once hit, only reovery is a watchdog timeout/reset.
If the offending packet is retransmitted, the chip will wedge again...
Check for teeny fragments in a Tx request, and either fold the
teeny chunk residue into an adjacent mbuf, or m_dup the entire buffer.
From NetBSD
Tested on alpha/amd64/macppc by krw@ and ok krw@
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Make pci_get_capability() work correctly on both header type 0 and type 2
devices; both have different Capability List Pointer registers.
From NetBSD
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Conditional jump to ami_ioctl() if NBIO > 0 is defined.
ok deraadt@ mickey@
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ok mickey@
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testing and ok
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Write the station address using 8-bits writes instead of 16-bits.
This is what the linux driver does, and makes the DGE-550T work.
Set bit 0x0020 in STGE_DebugCtrl too, the linux driver does it (the comments
note this as a workaround, without more details. This doesn't seem to make
things worse).
Also initialize STGE_RxDMABurstThresh and STGE_RxDMAUrgentThresh, using
values from the linux driver.
From NetBSD
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hme_init(): call mii_mediachg() to make sure the current media is set.
From NetBSD
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ok millert@
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- remove unused FreeBSD specific code
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ok grange@
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This is needed for bktr(4) to work on sparc64.
testing and ok by mickey and Jacob Meuser <jakemsr@jakemsr.com>
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from henric@ via deraadt@
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breaks some onboard de(4)'s. The conventional way of getting media settings
is just fine on alpha, so let's just use this. Shrinks de(4) a bit on alpha.
While there de-inline tulip_21140_mediainit().
ok brad@
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further net80211 changes. ok mickey@
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planetpixel dot de).
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originally pointed out by Mike Silbersack on the fbsd version of the iwi
driver.
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- for consistency fix order of operations for MII_TICK switch case in eephy
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Tweak the xmphy driver a little bit based on something I learned about
the built-in 1000baseX interface in the Level 1 LXT1001 chip. The Level 1
PHY comes up with the isolate bit in the control register set by default,
but it also has the autonegotiate bit set. When you tell the xmphy driver
to select IFM_AUTO mode, it sees that the autoneg bit is already on, and
thus doesn't bother updating the control register. However this means that
the isolate bit is never turned off (unless you manually select 1000baseSX
full or half duplex mode, which does result in the control register being
modified and the ISO bit being turned off).
This subtle and unusual behavioral difference stopped me from being able
to receive packets on the SMC9462TX card for several days, since isolating
the PHY disconnects it from the MAC's data interface. The fix is to omit
the 'is the autoneg big set?' test, since it doesn't really provide much
of an optimization anyway.
This commit also updates the xmphy driver to support the Jato/Level 1
internal PHY. (I'm not sure how Jato Technologies is related to Level 1:
all I know is the OUI from the PHY ID registers maps to Jato in the OUI
database.)
From FreeBSD
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Control muting of both left and right channels.
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From FreeBSD
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ok brad@
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