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ok deraadt@
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for some reason, so i had some code in there that tried to guarantee that.
however, newly allocated mbufs and clusters are physically contiguous and
bigger than 128 bytes. therefore we dont need to do that check.
while here check if there is enough space in the fifo before trying to
fill any of it. this means we can skip dma syncs if we're not going to end
up writing anything in the fifo.
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keep a list of used pkts in tht_pkt_list as well as free ones. add
tht_pkt_used which can be used to see if a tht_pkt_list is in use by
returning the head of the used list inside itself.
(ab)use this to drain the rx free fifo when the interface is brought down.
tht_rxf_drain pulls used pkts off, unmaps their mbufs, frees them, and then
returns the pkt to the free list. the whole tht_pkt_list can then be freed
safely.
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possible. it loops till it runs out of tht_pkts to use on the rx descriptor
free list, until it runs out of space in the fifo, or until it cant
allocate or map any more mbufs.
tht has a weird requirement that the first physical buffer in an sg list is
at least 128 bytes long. i have code that tries to guarantee that, but id
like someone else to look at it and tell me if its necessary or dumb.
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the hardware. oops.
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their dmamaps. so far it looks like the same thing can be used to look
after both the transmitted and recved packets.
this also adds code to allocate a list of them and set up their dmamaps,
some free list handling, and code to free them when you dont want them
anymore.
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two u_int32_ts
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a bit so theyre less offensive to my eyes. massage tht_rx_free a bit.
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We're doing DMA transfers without interrupts or some other indication and
100 microseconds is not enough on my X40 and so the firmware gets corrupted.
Increasing it to 500 microseconds this should give us enough safety margin.
OK mglocker@
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will try to bring the interface up in the middle of it being brought down.
im sleeping in tht_down while waiting for the tx fifos to drain, so its
possible something else can enter the ioctl handler while that's happening.
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brought up they allocate all four fifos and set the interface flags. when
theyre brought down they clear the flags, wait for the tx fifos to drain,
and then free all the fifos.
interrupts are not yet dealt with.
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is up or not.
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ifmedia about it.
im not sure what the point of the ifmedia goo is if the only link type we
support is "autoselect". using it to show the link state seems to be
easier than implementing that ioctl ourselves.
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one phy on Sun ERI; gets rid of the duplicate phy on the blade1k.
tested by many, ok drahn@
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the first is the addition of handlers for the fifos. you can now check if
there the fifo is ready to be used, pre sync it for use, do many
incremental updates to it, then post sync it to tell the hardware that
you've done something. the ready, pre, and post funcs are done for both
the reader and writer fifos, but only updates to the writer fifos is
implemented so far.
the second change is the firmware loading. i needed the above changes to do
this, and i needed firmware loading to test them, so this change gets both.
so we have a mountroot hook (that was the half change) that allocates the
tx task fifo, reads the firmware from disk, and then pushes the firmware
onto the fifo. once that is done it spins till the firmware is ready, then
cleans up everything it allocated for loading the firmware.
this diff wont time out if anything goes wrong during fw_load. if anyone
wants to look at a nice way of doing it, please do.
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ok kettenis@
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interleaved with data, which is copied directly into the task fifo of a
tht controller. the commands and data are all 32bit words, and they all
have to be little endian. this byteswaps the host ordered values in
microcode.h into little endian values for the controller to eat.
you can now build the firmware correctly on big endian archs.
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license. thanks to Alexander Indenbaum and Nick Bhavsar at Tehuti for
sorting this out.
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to fix it, and it goes in the way of good changes pedro is brewing.
No functional change, tested todd@ millert@
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there are four types of fifos: a tx task fifo (packets get sent via this),
a tx free fifo (for us to know when packets have been sent), a rx
descriptor fifo (to give empty packets for the nic to fill), and an rx free
fifo (when packets are recieved).
each port can have four sets of these fifos, so you can effectively have
completely independant io paths. however, due to the nature of our kernel
there is no advantage in implementing the use of more than one set of
these.
so this diff creates wrappers around fifos, the allocation of the dma
regions for them, and a description of which registers are used to manage
them.
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now been copied from ami into mpi, arc, vic, ahci, sili, and mfi. ive
probably forgotten some others too.
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sw_reset itself doesnt have to
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times to the same state. Ignore that.
Tested by thib@
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to print it.
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according to the reports I've been getting) it should be safe to enable
it again, so remove the #if 0 stuff around it.
ok marco
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parameter of 1 (dock).
This was causing acpidock to attempt to dock even if the machine was not
in its dock which was causing hangs on pre-60 series ThinkPads. It was
also causing my X60 to not see NOTIFY 0 (dock) messages which would
initiate the docking sequence.
Diff from Matthew R. Dempsky.
Tested on X60 by me, on T42/43 by brad, ckuethe, reyk, Johan M:son, and
on T21 by reyk. I think someone also tested on X40/41 but I don't
remember who. Thanks a lot.
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