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AgeCommit message (Collapse)Author
2021-03-10Fix typo for ATS attribute member in IORT root complex struct.Patrick Wildt
2021-03-09Add support for 30-bit color modes.Mark Kettenis
2021-03-08Add another Type Cover deviceJoshua Stein
from Fredrik Engberg
2021-03-08regenJoshua Stein
2021-03-08Add Surface Pro Type CoverJoshua Stein
from Fredrik Engberg
2021-03-08Allow uhidev child devices to claim selective report idsJoshua Stein
There may be multiple matching devices on a single uhidev device but the first device that responds to UHIDEV_CLAIM_ALLREPORTID will block the others from attaching. Change this to UHIDEV_CLAIM_MULTIPLE_REPORTID and require any devices wanting some/all report ids to fill in the claimed array in uhidev_attach_arg with just the reports it needs. uhidev can then run match routines for other drivers with the available report ids. ok anton
2021-03-08Add support for sdhc(4) on Raspberry Pi in ACPI mode.Mark Kettenis
ok patrick@
2021-03-08Add support for rk809 as seen on the Rock Pi N10 with the rk3399pro. AddKurt Miller
support for multiple linear ranges for voltage regulators and use for all rkpmic ICs. ok kettenis@
2021-03-07Fix aml_store() to work properly when the lvalue is a reference ofYASUOKA Masahiko
LocalX. In that case, resolving the reference must be done before resetting the LocalX variable. test daniel ok kettenis
2021-03-07Pass standard DMA tag to acpi(4) table drivers.Patrick Wildt
ok kettenis@
2021-03-07ansiJonathan Gray
2021-03-07ansiJonathan Gray
2021-03-07ansiJonathan Gray
2021-03-07ansiJonathan Gray
2021-03-06ansiJonathan Gray
2021-03-05ansiJonathan Gray
2021-03-05ansiJonathan Gray
2021-03-05ansiJonathan Gray
2021-03-03off by oneJonathan Gray
ok claudio@ deraadt@
2021-03-03Add a configurable button mapping for tap gestures on touchpads.Ulf Brosziewski
Thanks to RJ Johnson for this work! ok mpi@
2021-03-01Transactions on the AXI bus contain a Stream ID. SMMUs filterPatrick Wildt
based on Stream IDs. On the Armada 8040 these Stream IDs can be configured in different registers. The PCIe controller has a register which maps root port, bus, dev and func number to the Stream ID. This should be set up by TF-A firmware, but on the 8040 the current images don't do this. For chips with more than one PCIe controller this register must be setup correctly depending on the implementation, but on the 8040 there only is one controller, so we can configure a fixed value to match what is defined in the device tree. This allows the SMMU to properly track the PCIe controller's transactions. ok kettenis@
2021-03-01The ep-gpios property is optional on the Rockchip PCIe controller.Patrick Wildt
While there, enable the different voltage regulators and set the PHY's assigned clocks. This makes PCIe work on the NanoPi R4S. Tested by kurt@ on Rock Pi N10 and ROCKPro64 ok kurt@ kettenis@
2021-02-28Implement IOMMU OFW API for on-SoC/non-PCI devices.Patrick Wildt
ok kettenis@
2021-02-28Issue call to IOMMU OFW API to collect an IOMMU-sprinkled DMA tag.Patrick Wildt
ok kettenis@
2021-02-27regenJonathan Gray
2021-02-27sort and fix RTL8713 idJonathan Gray
2021-02-27regenJonathan Gray
2021-02-27sortJonathan Gray
2021-02-27regenJonathan Gray
2021-02-27add ids for Intel Xeon ScalableJonathan Gray
Used by at least Skylake-SP (SKX) and Cascade Lake-SP (CLX). Covers Xeon Scalable, Xeon D, Xeon W, Core Extreme/Core X product families. The Scalable parts are marketed as Xeon Bronze, Silver, Gold and Platinum. As most of these ids are not described in public documents from Intel use Skylake-ESystem.inf and KabyLakePCH-HSystem.inf from Intel's Windows drivers to get an idea of what the names should be. With the name for 0x2088 found in a Intel authored Linux driver. Initial patch and much discussion from Karel Gardas.
2021-02-26Read and parse OTP on the BCM4378. There are quite a few firmware andPatrick Wildt
nvram files used for the different Apple devices. The device tree and the OTP hold the information which of those we will have to use. For now this information will simply be printed, but depending on how we choose to do the firmare distribution we could use it for loadfirmware().
2021-02-26Attach to BCM4378.Patrick Wildt
2021-02-26Add support for BCM4378 as implemented on the Apple M1. This chip seemsPatrick Wildt
to use a different set of PCIE2REG registers. Accessing the "old" ones even leads to faults. There are two surprises though. One is that it seems that the interrupt status register always returns 0, and the other one is that we receive the interrupts way too early, but both can be worked around for now.
2021-02-26touch pcidevs again to generated new rcs ids in headersjan
advince from sthen@
2021-02-26Only support #iommu-cells = <1> for now to make sure the correct stream IDMark Kettenis
is passed to the IOMMU device driver. ok patrick@
2021-02-26Increase the amount of RX buffers given to the bwfm(4) chip. We haave seenPatrick Wildt
this already on previous chips, which only started giving us packets when handing over at least 128 of them. Apparently some now require 256, which seems to get the Apple M1's WiFi going.
2021-02-26Add missing PCI product IDs for x710 10GBase-T into ixl(4)jan
OK phessler
2021-02-26Increase the buffer size for the ioctl response buffers to the same asPatrick Wildt
used in the wifi firmware to ensure responses can be received.
2021-02-26Indicate hostready signal to inform the firmware that the rings have beenPatrick Wildt
initialized.
2021-02-26Refactor bwfm(4) firmware loading. The PCIe backend will need to be ablePatrick Wildt
to load the CLM blob like the SDIO backend already does. Additionally it is also helpful for the PCIe backend to try a file named after the device tree compatible. Thus refactor the SDIO code and make it available for both SDIO and PCIe.
2021-02-26Fix prio2fifo mapping table.Patrick Wildt
2021-02-25The firmware replaces the last 32-bit on RAM with a shared DRAM address.Patrick Wildt
While the for-loop checks that thie value has changed since we wrote to it, the timeout-condition checked for non-zero, which is wrong. This means that we didn't realize the firmware wasn't started. While there, make sure the shared DRAM address is inside the chip's address space.
2021-02-25Some newer chips have two D11/802.11 cores, and we need to reset both atPatrick Wildt
the same time.
2021-02-25Support for version 7 of the bwfm(4) PCIe interface. The size of the itemsPatrick Wildt
on the rx/tx complete rings has increased slightly to accomodate possible new features.
2021-02-25Add some infrastructure in the PCI chipset tag for pci_probe_device_hook()Patrick Wildt
so that we can provide IOMMU-hooked bus DMA tags for each PCI device. ok kettenis@
2021-02-25Add a framework for IOMMUs.Mark Kettenis
ok patrick@
2021-02-25Prevent zero size devices from attachingjan
This also fixes two NULL ptr derefs in later code path. OK patick@, krw@
2021-02-25we don't have to cast to caddr_t when calling m_copydata anymore.David Gwynne
the first cut of this diff was made with coccinelle using this spatch: @rule@ type caddr_t; expression m, off, len, cp; @@ -m_copydata(m, off, len, (caddr_t)cp) +m_copydata(m, off, len, cp) i had fix it's opinionated idea of formatting by hand though, so i'm not sure it was worth it. ok deraadt@ bluhm@
2021-02-24Enumerate GCI core, which seems to contain the OTP on the Apple M1.Patrick Wildt
2021-02-24remove unused usbd_get_device_string()Jonathan Gray
ok mpi@
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-17 12:11:39 +0000