Age | Commit message (Collapse) | Author |
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ok mpi@, tedu@, deraadt@
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Everything above 0x1040 is 1.x only.
Also tweak descriptoin of memory balloon device. There will be a memory
device, too
ok mlarkin@
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It accidentally contained a part of a different diff.
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Also add some virtio 1.0 status and feature bits
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And fix some comments
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overlapping the framebuffer. Prompted by ring tests failing.
Diagnosed, fix suggested by and ok kettenis@
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ok visa@
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in rasops(9) to allow selecting larger fonts when available.
Summary of the changes:
- Enable spleen8x16 for all architectures, replacing bold8x16_iso1.
- Enable spleen12x24 on all arches but sparc64, replacing gallant12x22.
- Enable spleen16x32 and spleen32x64 on amd64, i386, and arm64 for
GENERIC kernels.
- Modify the font selection logic in rasops(9) so the 16x32 and 32x64
fonts are selected if at least 120 columns can be displayed. Screens
with widths equal or larger than 1920px will use the 16x32 font, and
screens with widths equal or larger than 3840px the 32x64 one.
OK kettenis@, ratchov@, deraadt@
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They are only used if VIRTIO_DEBUG is enabled.
This should make the kernel slightly smaller.
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(interrupt) transfer.
When RL is not zero, interrupt transfer cannot work correctly.
It causes USB2.0 hub cannot detect device attach/detach.
ok by mpi@
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usbd_device2interface_handle().
ok visa@
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it assumes that it always followed an interrupt string, but we don't
print that on fdt. having the bus responsible for the whitespace
means the fdt glue can print a colon to separate the bus info from
checkrev output, while every other glue keeps the comma.
ok deraadt@
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In arch/amd64/amd64/machdep.c r1.239 (21.02.2018) guenther added DPRINTF,
redefining the one from dev/softraidvar.h. softraid(4) has been using
DNPRINTF exclusively since import in 2007, so simply remove the DPRINTF
macro definition from there.
OK krw
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"please commit asap" deraadt@
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this currently relies on the usbphy code in the ehci fdt glue to
work, but this is a work in progress. there's an extra printf of
fdt in the dmesg to make the ohci checkrev code not look terrible.
ok kettenis@
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claudio@ (i think) hit this a while back, and i've had this diff
in my tree since then. i'm putting it in now since it empirically
solved the problem and im sick of carrying the diff around.
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ok kettenis@
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should not throw an error.
ok kettenis@
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instead of regulator-min-voltage.
ok kettenis@
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mainline device tree.
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to the desired frequency as possible when setting the frequency of a clock.
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we end up with an optimal clock frequency for SD and eMMC.
ok patrick@
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GPLL like the Linux kernel does. Use NPLL for the CPU clock such that
adjusting the CPU frequency doesn't change the clock of other devices
anymore. Implement the last clocks that are used in the assigned-clocks
property of clock controller.
Don't enable the assigned-clocks processing yet as it results in a sub-optimal
clock for for the SD and eMMC controllers. This clock handling in dwmcc(4)
needs some further work before we can enable this.
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already scheduled and whether we have to unref the device ourselves.
ok tedu@, ratchov@
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each and every clock, use a data structure for each clock and generic code
that handles muxing and clock division based on that data structure.
This should reduce the amount of code and hopefully make the process of
adding clocks less error prone as it is easy to check the data structures
against the SoC documentation.
This approach will be used for the other Rockchip SoCs in the future as well.
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bit more time after a warm reset.
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them consistently.
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since we now have the possibility to specify it in the attach args.
ok kettenis@
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descriptors, which are used to encode 64k transfers since it's a
16-bit value in the descriptor, which means that we only support
a maximum segment size of 64k minus one. This fixes I/O errors
on i.MX machines.
ok kettenis@
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controller can handle for DMA tranfers, since not all support 64k.
ok kettenis@
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Thanks to jmc@ for improving the manual bits.
ok deraadt@ mpi@
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ok anton
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