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Age
Commit message (
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Author
2020-12-25
expose the mcx timer as a timecounter.
David Gwynne
2020-12-25
match on Gemini Lake I2C
Jonathan Gray
2020-12-25
Refactor klist insertion and removal
Visa Hankala
2020-12-25
Small smr_grace_wait() optimization
Visa Hankala
2020-12-24
Do proper accounting of zero length TDs. Currently a specific number
Marcus Glocker
2020-12-24
Extract clock frequency from _DSD properties.
Patrick Wildt
2020-12-24
Implement capability register overrides based on _DSD properties.
Mark Kettenis
2020-12-24
regen
Jonathan Gray
2020-12-24
add some NVMe devices and Intel Comet Lake host bridges
Jonathan Gray
2020-12-24
Initialize mips64 pmap pool using IPL_VM.
Visa Hankala
2020-12-24
ramdisks do not contain WOL
Theo de Raadt
2020-12-24
handle reported core clock frequency of 0 on newer Intel Comet Lake
Jonathan Gray
2020-12-24
tsleep(9): add global "nowake" channel for threads avoiding wakeup(9)
cheloha
2020-12-24
Add Wake on LAN support to rge(4).
Kevin Lo
2020-12-23
sigsuspend(2): change wmesg from "pause" to "sigsusp"
cheloha
2020-12-23
nanosleep(2): shorten wmesg from "nanosleep" to "nanoslp"
cheloha
2020-12-23
Use IPL_VM for the pmap pool like we do on amd64.
Mark Kettenis
2020-12-23
Ensure that filt_dead() takes effect
Visa Hankala
2020-12-23
Clear error before each iteration in kqueue_scan()
Visa Hankala
2020-12-23
Fix regulators that use "active-low" polarity. Our implementation now
Mark Kettenis
2020-12-23
Handle a few more userland traps that would lead to a kernel panic.
Mark Kettenis
2020-12-22
have the ifrxr info stuff report the buffer size the hw handles.
David Gwynne
2020-12-22
Use SIGILL for the Facility Unavailable Interrupt in usermode.
gkoehler
2020-12-22
Add PCIe clocks.
Mark Kettenis
2020-12-22
For a while the kerrnel reports EACCES to userland if pf blocks a
Alexander Bluhm
2020-12-22
Implement select(2) and pselect(2) on top of kqueue.
Martin Pieuchot
2020-12-22
Defer hardware initialization in order to give things like PCIe PHYs
Mark Kettenis
2020-12-22
Clear FSCR register. This gives us a sane default state where all facilities
Mark Kettenis
2020-12-22
name the rx rings like ix does for systat mb
David Gwynne
2020-12-22
Make clang the default compiler on loongson.
Visa Hankala
2020-12-22
stop showing amd l3 cache information
Jonathan Gray
2020-12-21
Only enable rasops1_putchar8() and rasops1_putchar16() optomizations on
Mark Kettenis
2020-12-20
Accept reject and blackhole routes for IPsec PMTU discovery.
Alexander Bluhm
2020-12-20
Fix typo.
Mark Kettenis
2020-12-20
The TCE table needs to be aligned on a boundary that is a multiple of its
Mark Kettenis
2020-12-20
Introduce klistops
Visa Hankala
2020-12-20
Convert uvm_km_valloc(9) calls to km_alloc(9). Tested in qemu with
Jonathan Matthew
2020-12-20
sync with i915_pciids.h
Jonathan Gray
2020-12-20
drm/i915: Remove dubious Valleyview PCI IDs
Jonathan Gray
2020-12-20
remove duplicate device id caused by subids in INTEL_IVB_Q_IDS
Jonathan Gray
2020-12-20
test against [VM_MIN_ADDRESS, VM_MAXUSER_ADDRESS] in access_ok()
Jonathan Gray
2020-12-19
Apply r1.86 of amd64 acpi_machdep.c to arm64 and i386, converting a few
Jonathan Matthew
2020-12-19
There's no need to include the OFW GPIO header.
Patrick Wildt
2020-12-19
Add support for the i.MX8MP PCIe clocks.
Patrick Wildt
2020-12-18
Add support for the i.MX8MP second ethernet. The Plus SoC not only has the
Patrick Wildt
2020-12-18
Emulate open drain GPIOs. This replaces the hack added in the last commit.
Mark Kettenis
2020-12-18
Add symbolic constants related to open source and open drain GPIOs.
Mark Kettenis
2020-12-18
Make large read and write transactions work.
Mark Kettenis
2020-12-18
Add glue for the USB3 controller on the i.MX8MP SoC. NXP had this glue for
Patrick Wildt
2020-12-18
Add code to initialize the USB 3 PHY on i.MX8MP.
Patrick Wildt
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