summaryrefslogtreecommitdiff
path: root/sys
AgeCommit message (Collapse)Author
2019-12-20Make athn(4) use a constant Tx retry rate while MiRA is probing.Stefan Sperling
Matches what iwm(4) has been doing for a long time to ensure that a good initial Tx rate will be chosen. Tested by Tracey Emery on AR9281.
2019-12-20Ignore new Rx block ack agreements until the WPA handshake is done.Stefan Sperling
Some peers will eagerly try to negotiate block ack (asking us to reserve buffer space) before they are done authenticating themselves. No thanks. Just let them try again later. ok mpi@
2019-12-20Have net80211 actually update the Rx block ack sequence number window,Stefan Sperling
as well as pulling frames off the Rx block ack reordering queue, when an incoming frame above the current seqnum window forces us to slide the window forward, potentially losing frames within the old window. Leaving the seqnum window out of sync with the queue would cause needlessly long stalls in traffic until the window moved again for some other reason. Problem observed on lossy wifi whenever netstat -W indicated an increasing "input block ack window slides" counter. With this fix, stalled frames can be observed only for a relatively short amount of time whenever one or more frames in the current window are lost. ok mpi@
2019-12-20Disable TSX when MSR_ARCH_CAPABILITIES sets TSX_CTRL.Jonathan Gray
Even with the latest microcode this is not set on all CPUs with TSX, but is set on CPUs which don't need MDS mitigations. MDS mitigations also mitigate TSX Asynchronous Abort (TAA) but aren't done if the CPU claims to not be affected by MDS (MDS_NO). According to "Deep Dive: Intel Transactional Synchronization Extensions (Intel TSX) Asynchronous Abort" CPUs requiring additional mitigations for this are: 06-8e-0c Whiskey Lake (ULT refresh) 06-55-0{6,7} 2nd Gen Xeon Scalable Processors based on Cascade Lake 06-9e-0d Coffee Lake R Currently TSX is disabled unconditionally when possible even if TAA_NO is set. We don't currently do MDS mitigations on i386. Attempt to disable TSX regardless to match amd64.
2019-12-20Disable TSX when MSR_ARCH_CAPABILITIES sets TSX_CTRL.Jonathan Gray
Even with the latest microcode this is not set on all CPUs with TSX, but is set on CPUs which don't need MDS mitigations. MDS mitigations also mitigate TSX Asynchronous Abort (TAA) but aren't done if the CPU claims to not be affected by MDS (MDS_NO). According to "Deep Dive: Intel Transactional Synchronization Extensions (Intel TSX) Asynchronous Abort" CPUs requiring additional mitigations for this are: 06-8e-0c Whiskey Lake (ULT refresh) 06-55-0{6,7} 2nd Gen Xeon Scalable Processors based on Cascade Lake 06-9e-0d Coffee Lake R Currently TSX is disabled unconditionally when possible even if TAA_NO is set. ok bluhm@ guenther@ deraadt@ tested by bluhm@ on i5-8365U (06-8e-0c).
2019-12-19spelling; from bryan stensonJason McIntyre
2019-12-19Start protecting the pipe_peer member of `struct pipe' using theanton
pipe_lock. This add a potential sleeping point in the kqueue filter routines which should be fine by now thanks to changes made to the kqueue subsystem by visa. ok visa@
2019-12-19Convert boolean_t/TRUE/FALSE to int/1/0 for coherency with the rest ofMartin Pieuchot
the kernel. ok patrick@
2019-12-19Convert boolean_t/TRUE/FALSE to int/1/0 for coherency with the rest ofMartin Pieuchot
the kernel. ok mlarkin@, visa@
2019-12-19Convert boolean_t/TRUE/FALSE to int/1/0 for coherency with the rest ofMartin Pieuchot
the kernel. ok mlarkin@, visa@
2019-12-19Convert infinite sleeps to {m,t}sleep_nsec(9).Martin Pieuchot
ok visa@
2019-12-19poll handlers must return a poll(2) revents value, not errno(2) values.Reyk Floeter
Some drivers have returned ENXIO (6) if the device is not available which incorrectly translates into POLLPRI|POLLOUT (2|4) in userland. Change it to POLLERR for now, but it might as well be POLLHUP. OK mpi@
2019-12-19Add size for free() in vio(4).Frederic Cambus
There is an existing allocsize variable tracking size of allocations, turns out we can pass it to free in the error path. OK florian@, mpi@
2019-12-19Use bus_size_t as the type for the base address.Mark Kettenis
ok deraadt@, dlg@
2019-12-18Set vm_map's pmap in uvm_map_setup().Visa Hankala
OK guenther@, kettenis@, mpi@
2019-12-18Mask high bits of iwm(4) firmware SYSASSERT codes before matchingStefan Sperling
against codes in the known-codes table, like Linux does it. Mark the known-codes table static so it won't ever collide with symbols declared elsewhere in the kernel. Also add some more cause codes found in iwlwifi. I still keep hitting firmware SYSASSERT codes that aren't declared in this table, though :( These changes only affect IWM_DEBUG builds.
2019-12-18Re-enable firmware-based Tx retries at lower rates for iwm(4).Stefan Sperling
Firmware-based Tx retries were disabled when it was found that MiRA makes better choices while probing with a constant Tx retry rate. Before that change, high Tx rates looked better than they actually were. The change resulted in less retries and thus higher throughput because a lower, but actually working, initial Tx rate eventually became the preferred choice. However, disallowing retries at lower rates also resulted in increased amounts of observable packet loss, especially while the connection to the AP was still fresh and bad Tx rates had not been discovered yet. To get the best of both worlds, use a constant Tx rate for retries while MiRA is probing and otherwise allow firmware fallback to lower rates. tested by Tracey Emery, pamela, jasper, and myself, on 7265/8265/9260
2019-12-18Allow pagefault_disable() to be called recursively, something that may happenMark Kettenis
in inteldrm(4). ok guenther@
2019-12-18Use separate rwlock initializations for userland ("vmspace") and kernelMark Kettenis
maps. This lets witness know that these really are different classes avoiding false positives when detecting lock order reversals. ok guenther@, visa@, mpi@
2019-12-18typoTheo de Raadt
2019-12-18undo assumptions about MI .h inclusionsTheo de Raadt
2019-12-18audio(4): msleep(9) -> msleep_nsec(9)cheloha
ok ratchov@
2019-12-17arm64 cpus speculatively execute instructions after ERET, and on someTheo de Raadt
processors not all microarchitectural side effects are abandoned, leading to spectre-like effects. This was fixed quietly and without responsible disclosure by ARM in linux mainline a year ago, but rediscovered independently by Anthony Steinhauser. ok patrick guenther kettenis comment to ARM: "Responsible Disclosure" doesn't mean "downplay at maximum to avoid damage to the bottom line", the responsibility aspect entails ensuring "all customers are aware of the defect". What happened here is indistinguishable from Intel's behaviour, and that's not the look you want.
2019-12-17Add fido(4), a HID driver for FIDO/U2F security keysReyk Floeter
While FIDO/U2F keys were already supported by the generic uhid(4) driver, this driver adds the first step to tighten the security of FIDO/U2F access. Specifically, users don't need read/write access to all USB/HID devices anymore and the driver also improves integration with pledge(2) and unveil(2): It is pledge-friendly because it doesn't require any ioctls to discover the device and unveil-friendly because it uses a single /dev/fido/* directory for its device nodes. It also allows to support FIDO/U2F in firefox without further weakening the "sandbox" of the browser. Firefox does not have a proper privsep design and many operations, such as U2F access, are handled directly by the main process. This means that the browser's "fat" main process needs direct read/write access to all USB HID devices, at least on other operating systems. With fido(4) we can support security keys in Firefox under OpenBSD without such a compromise. With this change, libfido2 stops using the ioctl to query the device vendor/product and just assumes "OpenBSD" "fido(4)" instead. The ioctl is still supported but there was no benefit in obtaining the vendor product or name; it also allows to use libfido2 under pledge. With feedback from deraadt@ and many others OK kettenis@ djm@ and jmc@ for the manpage bits
2019-12-17Add code to parse DDR4 and LPDDR3/4 SPD memories.Claudio Jeker
Some numbers may be wrong but it a start and further fixes can happen in tree. Especially the LPDDRx case is untested. OK deraadt@
2019-12-17Add support for NCT6775F, NCT5104D, NCT6779D, NCT679[1235]D sensors.mortimer
From Joe Gidi.
2019-12-16Update piixpm(4) to support newer AMD chips like some Hudson-2 andClaudio Jeker
especially KERNCZ (AMD FCH SMBus). Additionally this also implements multi-bus support for SB800, Hudson-2 and KERNCZ. Tested by many. Input & OK kettenis@
2019-12-16Extend the expected SPD types to include DDR4 and low-power DDR3 & 4.Claudio Jeker
OK deraadt@ kettenis@
2019-12-16bktr(4): tsleep(9) -> tsleep_nsec(9)cheloha
ok deraadt@
2019-12-15Add a missing unlock.Visa Hankala
Spotted by Hrvoje Popovski using witness(4) OK dlg@
2019-12-14rkpcie: Add support for gen2 negotiationKurt Miller
* Enable gen2 link training when the dtb is configured with max-link-speed = <2>; * Workaround a rockchip bug where Target Link Speed is not set when PCIE_CLIENT_PCIE_GEN_SEL_2 is configured * Wait for LTSSM L0 state after initial link training to ensure gen2 link training does not start too early okay kettenis@
2019-12-14Add sizes for free() in eso(4).Frederic Cambus
OK tedu@
2019-12-14Add sizes for free() in eap(4).Frederic Cambus
OK tedu@
2019-12-14Add sizes for free() in auixp(4).Frederic Cambus
OK tedu@
2019-12-14Add sizes for free() in auglx(4).Frederic Cambus
OK tedu@
2019-12-14Add sizes for free() in auacer(4).Frederic Cambus
OK tedu@
2019-12-14Revert previous. When we get an ACPI notification we already have thePatrick Wildt
ACPI lock and when we call our own ws_[gs]et_param functions we cannot take the lock again, because it's non-recursive. Thus we need to find another way, like not taking the lock if we already have it. But the solutions need to be discussed first, so back it out in the meantime.
2019-12-13noone has gpr(4) devices.Theo de Raadt
2019-12-13Make acpivout(4) call ws_[gs]et_param instead of directlyPatrick Wildt
calling the ACPI methods. On some machines, like my X395, those ACPI methods don't allow changing the brightness, so this allows acpivout(4) to e.g. use amdgpu(4)'s code. ok kettenis@
2019-12-13pvclock(4): attach even if when PVCLOCK_FLAG_TSC_STABLE is unsetpd
Attaches pvclock with lower priority (500) in case of unstable tsc (PVCLOCK_FLAG_TSC_STABLE) instead of not attaching at all. In this state, we do make sure to return a monotonically increasing number. This mostly helps openbsd guests on openbsd vmm(4) where a pvclock with unstable tsc is still better than i8254. ok mlarkin@
2019-12-13Ensure VMCS is flushed/loaded properly in certain uncommon cases.Mike Larkin
This diff ensures we reload the VMCS before we dump its content in a few debug code paths, and ensures we flush the VMCS in a few error paths in the writeregs VMX function.
2019-12-13Always release interrupt source when unmasking the interruptMike Belopuhov
xen_intr_unmask_release was not decrementing the reference counter on the interrupt source structure when bailing out early which led to the refcnt overflow. From niklas, ok mlarkin
2019-12-12tc_setclock: reintroduce timeout_adjust_ticks() callcheloha
Missing piece of tickless timeout revert.
2019-12-12Recommit "timeout(9): make CIRCQ look more like other sys/queue.h data ↵cheloha
structures" Backed out during revert of "timeout(9): switch to tickless backend". Original commit message: - CIRCQ_APPEND -> CIRCQ_CONCAT - Flip argument order of CIRCQ_INSERT to match e.g. TAILQ_INSERT_TAIL - CIRCQ_INSERT -> CIRCQ_INSERT_TAIL - Add CIRCQ_FOREACH, use it in ddb(4) when printing buckets - While here, use tabs for indentation like we do with other macros ok visa@ mpi@
2019-12-12Recommit "tc_windup: separate timecounter.tc_freq_adj from ↵cheloha
timehands.th_adjustment" Reverted with backout of tickless timeouts. Original commit message: We currently mix timecounter.tc_freq_adj and timehands.th_adjtimedelta in ntp_update_second() to produce timehands.th_adjustment, our net skew. But if you set a low enough adjfreq(2) adjustment you can freeze time. This prevents ntp_update_second() from running again. So even if you then set a sane adjfreq(2) you cannot unfreeze time without rebooting. If we just reread timecounter.tc_freq_adj every time we recompute timehands.th_scale we avoid this trap. visa@ notes that this is more costly than what we currently do but that the cost itself is negligible. Intuitively, timecounter.tc_freq_adj is a constant skew and should be handled separately from timehands.th_adjtimedelta, an adjustment that we chip away at very slowly. tedu@ notes that this problem is sort-of an argument for imposing range limits on adjfreq(2) inputs. He's right, but I think we should still separate the counter adjustment from the adjtime(2) adjustment, with or without range limits. ok visa@
2019-12-12Reintroduce socket locking inside socket event filters.Visa Hankala
Tested by anton@, sashan@ OK mpi@, anton@, sashan@
2019-12-12Allow sleeping inside kqueue event filters.Visa Hankala
In kqueue_scan(), threads have to get an exclusive access to a knote before processing by calling knote_acquire(). This prevents the knote from being destroyed while it is still in use. knote_acquire() also blocks other threads from processing the knote. Once knote processing has finished, the thread has to call knote_release(). The kqueue subsystem is still serialized by the kernel lock. If an event filter sleeps, the kernel lock is released and another thread might enter kqueue_scan(). kqueue_scan() uses start and end markers to keep track of the scan's progress and it has to be aware of other threads' markers. This patch is a revised version of mpi@'s work derived from DragonFly BSD. kqueue_check() has been adapted from NetBSD. Tested by anton@, sashan@ OK mpi@, anton@, sashan@
2019-12-12Unhook <machine/stdarg.h> from <sys/stdarg.h>. Nowadays all theVisa Hankala
compilers that OpenBSD provides have builtins for vararg routines and use the machine-independent definitions in <sys/stdarg.h>. Input from miod@ OK millert@
2019-12-12On a HP EliteBook 830 G6 the Computrace executable is located inAlexander Bluhm
the area where the boot loader copies the kernel. Its EfiLoaderCode is write protected, so the boot loader hangs in memmove(). As we may use this memory after calling EFI ExitBootServices(), change the protection bit to writeable in the page table. OK deraadt@ mlarkin@ patrick@
2019-12-12Header cleanup.Martin Pieuchot
- reduces gratuitous differences with NetBSD, - merges multiple '#ifdef _KERNEL' blocks, - kills unused 'struct vm_map_intrsafe' - turns 'union vm_map_object' into a anonymous union (following to NetBSD) - move questionable vm_map_modflags() into uvm/uvm_map.c - remove guards around MAX_KMAPENT, it is defined&used only once - document lock differences - fix tab vs space ok mlarkin@, visa@