| Age | Commit message (Collapse) | Author |
|---|
|
ok marco
|
|
way, rather than requiring some glue in each machines mainbus probe.
it is still commented out.
based on a discussion with miod@ ok marco@ deraadt@
|
|
|
|
accessing FFS1 fields, okay art@, quite some testing by ckuethe@, simon@
and thib@, thanks.
|
|
|
|
we had to put this workaround in since /etc/rc used to use the exit code
if "ifconfig pflog0" to decide wether we run on a kernel with pflog support.
rc has been fixed to explicitely create pflog0 when pf and pflogd are
enabled in November 2006, so now is the time to remove this compat hack.
pplz who haven't updated rc since 2006/11/16 lose pflogd. ok ryan theo
|
|
The "lapic" timer is ripped out since it wasn't actually a lapic timer,
but a hacked up tsc timer with some synchronization for MP. There is no
tsc timer right now since they are very unreliable on MP systems, systems
with apm, and systems that change the cpu clock. Which basically means
every modern machine out there. We're running with the i8259 timer now.
deraadt@ ok
|
|
the timedelta sensor when no PPS signal is available.
Previously, the timestamp was taken at the leading '$' character
of a GPRMC message, which was not always correct, as some GPS units
send other messages first; we do not know when the GPRMC message
is sent within a data block (we refer to a data block as the set
of NMEA messages that are sent by a GPS unit in one go, usually
once per second).
nmea(4) now takes the timestamp at the first '$' character received
after the start of a new seconds. Since GPS units transmit a data
block every second, the first message can be found by measuring the
gap between consecutive messages: after the longest gap, the first
message of the next second follows. And it is at the leading '$'
character of this message that we take the timestamp.
$GPGGA,..... <- take timestamp here
$GPGSA,.....
$GPRMC,..... <- decode time here
... <- possibly more messages
<- longer gap till start of next second
$GPGGA,..... <- it starts all over, take next timestamp
This code has been designed to work independent of the baudrate and
the rate at which the GPS sends out it's data blocks (usually 1 Hz,
but 5 Hz units are common as well):
With this change, precision is greatly improved in the absence of a
PPS signal and as a side effect, jitter is reduced.
Note that while this is much better than before, there is still a
slight offset to the real time, as calculating the fix in the GPS unit
and transmitting the '$' character takes a short, but unpredictable
amount of time.
When tty timestamping is enabled, but there is no PPS signal available,
the sensor status will be degraded to CRITICAL, which means "check your
hardware".
Thanks to Chris Kuethe for testing and feedback. ok ckuethe.
|
|
|
|
implementation of a RAID 1 is included in this but it does not deal with
failures yet. Disabled in GENERIC.
Suggestions from and ok beck@ miod@ krw@ dlg@ deraadt@
|
|
BCM5756). They still don't work but when they do they won't use an
inappropriate Jitter bug workaround. No effect on other chips.
From Michael Chan of Broadcom, via Linux tg3 via Brad.
ok reyk@
|
|
This provides a similar functionality as ARP balancing,
but also works for traffic that comes across routers.
IPv6 is supported as well.
The configuration scheme will change as soon we have sth better.
Also add support for changing the MAC address on carp(4)
interfaces. (code from mcbride)
Tested by pyr@ and reyk@
OK mcbride@
|
|
ok deraadt@
|
|
|
|
|
|
controllers don't. Put in a temporary hack for pxammc on Zaurus.
|
|
|
|
We use the suggested workaround for the problem E40 in the PXA27x errata
sheet. Unfortunately this limits the bus speed to 9.75Mhz.
|
|
|
|
time.
Chris; Get your shiz fixed and tested for the next time. We have
better todo then wasting our time by backing out untested stuff.
OK deraadt, OK ckuethe
|
|
|
|
|
|
okay millert@
|
|
|
|
|
|
http://bcm-specs.sipsolutions.net/80211Init.
o Add a rewritten version of bcw_core_reset() called bcw_80211_core_reset()
according to http://bcm-specs.sipsolutions.net/80211CoreReset. This
will probably replace bcw_core_reset(), but I need more verification
first.
o Add bcw_core_enable() and bcw_core_disable(). There seems to be
devices which contain several 802.11 cores. The unused needs to be
disabled.
|
|
w/ in a more simple way as other archs do; art@ ok
|
|
weren't on the sleep queues, the condition we were sleeping on might
have changed, so we need to go back to userland and recheck that condition.
This fixes the majority of lockups and and hanging threads in rthreads
since it fixes a race in the semaphore code.
ok tedu@
|
|
but defer the remainder of their initialisation until after the other devices
on their PCI bus have attached. This ensures that any USB2 controller has also
completed its initialisation before we start to initialise the USB1 parts.
This minimises the chance that a nasty SMM implementation will trash the USB1
controller's config when it performs legacy emulation handover of the USB2 part.
|
|
and defer the delay for root hubs until the host controller event thread
starts, permitting some concurrency. Speeds up the boot process dramatically
when you have lots of host controllers.
ok dlg@
|
|
reset, rather than at suspend/resume, otherwise any BIOS inserted value
is lost immediately.
ok dlg@
|
|
|
|
reported by brad
|
|
interrupts to be able to have an atomic update of a variable without a mutex.
|
|
ok drahn@
|
|
ok miod@
|
|
confused.
|
|
|
|
|
|
one for all SPI controllers. krw has a sun machine with a 1030 that gets
the bus width wrong too, so since vmware emulates that type of hardware
too, we can just limit the lot of them and forget about it.
|
|
MGETHDR and fail if it's NULL.
ok miod@
|
|
prodded by art@ ok art@
|
|
|
|
Stefan Sperling <stsp@stsp.in-berlin.de>
so enable it
|
|
|
|
From Eric Gillingham <sysrq@sysrq.tk>
|
|
support, so revert my previous commit
|
|
called bcw_chip_init(), according to the 80211Init steps in the spec.
|
|
Fixes a problem that prevented the booting of a kernel that, to be
found, needs more than one block per directory iin its path to be read.
ok miod@, deraadt@
|
|
|
