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2012-10-08Avoid accessing .data or .bss from real mode, since they may not be withinJoel Sing
the current segment. Load and store the necessary BIOS registers from protected mode, preserving the register values across the real mode and protected mode switches by directly patching instructions. This allows for boot(8) to be larger than 64KB.
2012-10-08reduce the difference between i386 and amd64 versions of the speedstep codeJonathan Gray
2012-10-07spacingMike Belopuhov
2012-10-07Align the stack on a 64-byte boundary as required by "The 32-bit PA-RISCMark Kettenis
Run-time Architecture Document". GCC relies on this to properly align stack variables. ok guenther@, beck@
2012-10-06Remove bridge_rttrim(). It's only triggered in the unlikely event that theCamiel Dobbelaar
routecache is full and the admin is making it smaller. It then does a lame attempt at shrinking the routecache, something that a flush or flushall can do better. ok henning beck
2012-10-05Point an interface directly to its bridgeport configuration, insteadCamiel Dobbelaar
of to the bridge itself. This is ok, since an interface can only be part of one bridge, and the parent bridge is easy to find from the bridgeport. This way we can get rid of a lot of list walks, improving performance and shortening the code. ok henning stsp sthen reyk
2012-10-05include sys/mbuf.hCamiel Dobbelaar
2012-10-05missing NCARP define and fix indentCamiel Dobbelaar
2012-10-05missing include for pfCamiel Dobbelaar
2012-10-05protect against multiple inclusionCamiel Dobbelaar
2012-10-05Avoid uninitiliazed use of ctl and corresponding warnings.Christiano F. Haesbaert
Part of the work to remove -Wno-uninitialized. ok kettenis@
2012-10-05add send(2) MSG_DONTWAIT support which enables us to choose nonblockingYASUOKA Masahiko
or blocking for each send(2) call. diff from UMEZAWA Takeshi ok bluhm
2012-10-04Clean up uninitialized warnings from cryptosoft and aesni.Christiano F. Haesbaert
Part of the work to remove -Wno-uninitialized. ok mikeb@
2012-10-04Clean up uninitialized warnings from ar9003.Christiano F. Haesbaert
Part of the work to remove -Wno-uninitialized. ok kettenis@
2012-10-04Use information provided by ACPI to attach secondary PCI host bridges.Christian Ehrhardt
ok kettenis@
2012-10-03Don't include <mips64/archtype.h> unless you really need it.Miod Vallat
2012-10-03Do not use <mips64/archtype.h> for loongson model numbers, but rather put theMiod Vallat
list in loongson's <machine/autoconf.h> directly. <mips64/archtype.h> is intended to be only used on ARCBios-like platforms.
2012-10-03Don't include <mips64/archtype.h> when you don't need it.Miod Vallat
2012-10-03Split ever-growing mips <machine/cpu.h> into what 99% of the kernel needs,Miod Vallat
which will remain in <machine/cpu.h>, and a new mips_cpu.h containing only the goriest md details, which are only of interest to a handful set of files; this is similar in spirit to what alpha does, but here <machine/cpu.h> does not include the new file.
2012-10-03attach to D-Link WUA-2340, from Aaron Wirtz on misc@Stuart Henderson
2012-10-03syncStuart Henderson
2012-10-03add D-Link WUA-2340, reported working with uath by Aaron Wirtz on misc@Stuart Henderson
2012-10-01More compliance fixes: hiding non-standard stuff behind __BSD_VISIBLE,Philip Guenthe
making files stand-alone, some __restrict additions. tweaks kettenis@; ports testing and fixes landry@ and jasper@ ok millert@
2012-10-01Make groupmember() check the effective gid too, so that the checks arePhilip Guenthe
consistent when the effective gid isn't also a supplementary group. ok beck@
2012-09-30Correct the addition of the 39320LPE controller. The actual product nameBrad Smith
is 29320LPE since it is a single channel adapter. No functional change other than priting the correct chipset in the dmesg. Pointed out by henning petersen.
2012-09-30There is no need to set IFF_OACTIVE in vlan, since there is no DMA ringClaudio Jeker
that can be filled. OK dlg@, mikeb@
2012-09-30Remove duplicated chunk; noticed by David GilmoreMiod Vallat
2012-09-30Simplify the gem(4) variant detection code a bit.Brad Smith
ok haesbaert@
2012-09-29When running a.out OMAGIC binaries, be sure to round ep_daddr to a pageMiod Vallat
boundary; uvm depends on this and will KASSERT this for its own safety. Found the hard way, rounding direction discussed with ariane@ (I initially wanted to round down, but it makes more sense to round up). Of course noone in his right mind ought to run OMAGIC binaries (-:
2012-09-29Work in progress support for the Power Indigo2 R8000 system (IP26). This isMiod Vallat
basically an IP22 system (R4000 Indigo2) with the ECC memory board of IP28, and a so-called ``streaming'' L2 cache. IP26 kernels currently boot single-user, but don't live long; I am suspecting a bug in the tcc cache routines, but am currently not able to find it (come to think of it, my understanding of how this cache works could be wrong, and of course there is no documentation for it but what can be gathered from IRIX' <sys/IP26.h> comments and defines). Hopefully this situation will improve in the near future; in the meantime I am commiting this as `work in progress' to make sure this code doesn't get lost.
2012-09-29Bring the `let decide ARCBios address at runtime' code to the SGI bootblocks,Miod Vallat
which allows them to run on IP26 (POWER Indigo2 R8000). Crank boot blocks version.
2012-09-29Do not hardcode ARCBios vector base, but rather compute it at runtime.Miod Vallat
This allows MI code to support both 32-bit ARCS systems, as well as 64-bit R8000 and R1x000 systems. While there, #if 0 out ARCBios routines currently not used by the kernel.
2012-09-29Basic R8000 processor support. R8000 processors require MMU-specific code,Miod Vallat
exception-specific code, clock-specific code, and L1 cache-specific code. L2 cache is per-design, of which only two exist: SGI Power Indigo2 (IP26) and SGI Power Challenge (IP21) and are not covered by this commit. R8000 processors also are 64-bit only processors with 64-bit coprocessor 0 registers, and lack so-called ``compatibility'' memory spaces allowing 32-bit code to run with sign-extended addresses and registers. The intrusive changes are covered by #ifdef CPU_R8000 stanzas. However, trap() is split into a high-level wrapper and a new function, itsa(), responsible for the actual trap servicing (which name couldn't be helped because I'm an incorrigible punster). While an R8000 exception may cause (via trap() ) multiple exceptions to be serviced, non-R8000 processors will always service one exception in trap(), but they are nevertheless affected by this code split.
2012-09-29Forgot this in previous commitMiod Vallat
2012-09-29Store the base value of coprocessor 0 system register, when running userland,Miod Vallat
into a global. This allows R12000 O2 systems to set the DSD bit in once for all, instead of having to set it every time in setregs().
2012-09-29Sort cpu and fpu list, and don't bother printing those we don't run on (yet).Miod Vallat
2012-09-29Handle the coprocessor 0 cause and status registers as a 64 bit value now,Miod Vallat
as some odd mips designs need moro than 32 bits in there. This causes a lot of mechanical changes everywhere getsr() is used.
2012-09-29Avoid an unnecessary copyin() call in the SYS__syscall handling path.Miod Vallat
2012-09-29Add a few more coprocessor 0 cause and config registers defines.Miod Vallat
2012-09-29Kill the mostly unused VMTLB_xxx and VMNUM_xxx defines. Move all tlbMiod Vallat
knowledge to <machine/pte.h>. Add specific routines for tlb handling setup (at cpu initialization time) and tlb ASID wrap.
2012-09-29Introduce assembly macros for specific processor hazards: tlb update, statusMiod Vallat
register update, status register update causing a change to the interrupt enable flag, and a few other arcane ones. <mips64/asm.h> will provide (supposedly sane) defaults, and <machine/asm.h> may override these with better tuned versions. Use these macros instead of random strings of nop in the various .S files requiring hazard workarounds.
2012-09-29Move proc_trampoline, which is not really exception processing, from exception.SMiod Vallat
to context.S, to eventually allow alternate versions of exception.S to be used.
2012-09-29Use a much simpler linker script for the kernel, adapted from loongsonMiod Vallat
2012-09-29Provide a few more macros in <machine/asm.h> to wrap coprocessor 0Miod Vallat
move from/to register instructions, as well as a NOP macro. These will be used in a later diff to allow specific processors to use slightly different instructions or encodings.
2012-09-29Proide a mips_sync() macro to wrap asm("sync"), and replace gazillions ofMiod Vallat
such statements with it.
2012-09-29add support for hardware flow control, from FreeBSDJonathan Gray
2012-09-29regenJonathan Gray
2012-09-29add some uslcom devices from FreeBSDJonathan Gray
2012-09-29From Gavin Atkinson in FreeBSD SVN rev 238778:Jonathan Gray
The baud rate on CP1201/2/3 devices can be set in one of two ways: - The USLCOM_SET_BAUD_DIV command (0x01) - The USLCOM_SET_BAUD_RATE command (0x13) Devices based on the CP1204 will only accept the latter command, and ignore the former. As the latter command works on all chips that this driver supports, switch to always using it. A slight confusion here is that the previously used command was incorrectly named USLCOM_BAUD_RATE - even though we no longer use it, rename it to USLCOM_SET_BAUD_DIV to closer match the name used in the datasheet. This change reflects a similar change made in the Linux driver, which was submitted by preston.fick at silabs.com, and has been tested on all of the uslcom(4) devices I have to hand.
2012-09-28fix adress family for ipv6 bpf packet capture; ok yasuokaMarkus Friedl
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