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2015-06-05Finally protect VP lookups to guarantee that a pted won't be freed orMartin Pieuchot
reused by a CPU while another CPU is manipulating it. This races occurs because the virtual spill handlers are run without taking the KERNEL_LOCK for obvious reasons. So use a per-pmap mutex that CPUs must hold when modifying a pted in order to guarantee the atomicity of operations *and* the coherence between pmap VPs tree and what's in the HASH. Thanks to dlg@ for assisting me debugging this. This change ends your PowerPC pmap SMP show of the week. GENERIC.MP on macppc should now be stable enough to build ports without corrupting its own memory. ok kettenis@, deraadt@, dlg@
2015-06-05Don't try to be clever when unrolling the loop in pmap_remove().Martin Pieuchot
Needed for upcoming locking.
2015-06-05Replace the per-entry locks by a global HASH lock.Martin Pieuchot
Since this lock is recursive we can now guarantee the atomicity of pte_inser{32,64}() when a pted has to be removed first. This fixes one of the races. Using a __mp_lock here also allowed dlg@ to provide me useful traces to fix the next race. Thanks for your help! ok kettenis@, deraadt@, dlg@
2015-06-05Call pte_spill_v() from the real mode fault handler instead of rerollingMartin Pieuchot
it. This will reduce the number of places to audit for locking. Note that for profiling purposes pte_spill_v() is now marked a __noprof since per-CPU profiling buffers are not guaranteed to be 1:1 mapped and cannot be accessed from the real mode fault handler. ok kettenis@, deraadt@, dlg@
2015-06-05Rewrite PTE manipulation routines to better match the PEM.Martin Pieuchot
Document every operation, make sure to call "sync" when appropriate so that other CPUs see the bit changes and finally grab a lock where it was missing to grantee atomicity. ok kettenis@, deraadt@, dlg@
2015-06-05Split pteclrbits() into pmap_{test,clear}_attrs().Martin Pieuchot
This should not introduce any behavior change but makes the code easier to read and later easier to protect. This also brings this pmap closer to what others do. Thanks to kettenis@ for spotting a bad typo! ok kettenis@, deraadt@, dlg@
2015-06-05More usages of pmap_ptedinhash().Martin Pieuchot
If you wonder why pte_insert{32,64}() is not using pmap_hash_remove() if it finds a conflicting PTE in the HASH, it's because in the current state trying to grab the same lock a second time would lead to a deadlock. This is much easier to reproduce on G5 (or G4 with BAT disabled). ok kettenis@, deraadt@, dlg@
2015-06-05Remove DEBUG stuff.Martin Pieuchot
2015-06-05Make use of ptesr() instead of rerolling it.Martin Pieuchot
2015-06-05Merge various copies of the same code into a new function to determineMartin Pieuchot
if a PTE is present in the HASH. Note that atomicity is currently not guaranteed between this check and the following operations. ok kettenis@, deraadt@, dlg@
2015-06-05Introduce pmap_pted_ro() a simple wrapper for the 32/64 bits versionsMartin Pieuchot
that does not call pmap_vp_lookup(). Carreful readers would have notice the removal of the bits on the virtual address with a page mask, this change allows me to find the 13 years old bug fixed in r1.145. ok kettenis@, deraadt@, dlg@
2015-06-05Do only one VP lookup when removing a page.Martin Pieuchot
This simplify pmap_remove() & friends by re-using an already fetched PTE descriptor. There's currently a race on MP system where one CPU can reuse a pted while another one is still trying to insert it in the HASH. This commit starts reducing the number of pmap_vp_lookup() calls to help fix this race. ok kettenis@, deraadt@, dlg@
2015-06-05Remove the MANAGED flag when removing a PV entry.Martin Pieuchot
Even if this change is not strickly needed, because the memory will be returned to the pool it helped me track the use-after-free.
2015-06-05Remove unneeded splvm() calls and the pool_setipl(9) hack of r1.140.Martin Pieuchot
By instructing spl(9) calls on MP machines I figured out that their high cost was hiding a race condition involving PTE reuse in our pmap. Thanks to deraadt@ for finding a way to trigger such panic by adding a couple of splvm(). This should make the races easier to trigger but will be addressed shortly. This commit starts your PowerPC pmap SMP show of the week. ok kettenis@, deraadt@, dlg@
2015-06-05Use p15 for the coprocessor name not 15. gas accepts both forms, clangJonathan Gray
won't accept just a number which a comment in the gas code mentions is for backward compatibility.
2015-06-05regenStefan Sperling
2015-06-05Add another PCI ID for Intel Dual Band Wireless AC 3165. From brad.Stefan Sperling
2015-06-04enable rtwn(4) on i386Stefan Sperling
2015-06-04Enable rtwn(4) on amd64.Stefan Sperling
2015-06-04attach rtwn at pciStefan Sperling
2015-06-04New rtwn(4) driver for RTL8188CE wifi cards.Stefan Sperling
This is a PCI card from the same chip family as supported by urtwn(4) on USB. Development started in 2013 using urtwn(4) as a starting point but was dormant for much of the time since. I finally unslacked after uwe@ provided help with lifting this driver on its feet. As usual we got helpful hints from Theo. Requires firmware which will be available in ports soon. There are rate adaptation issues that still need to be fixed, cause unknown. In my testing the hardware rarely transmits more than 1Mbit/s. Committing over MAC/BB RTL8188CE, RF 6052 1T1R.
2015-06-04syncTheo de Raadt
2015-06-04+ REALTEK RT8191SETheo de Raadt
2015-06-04Add support for em(4) on Teak 3020, a Tolopai (EP80579)Dariusz Swiderski
based devices. This introduces Realtek PHY into em driver code and is only a temporary solution to the problem. OK deraadt@
2015-06-04The (no quite so) new kernel perfpolicy code calls cpu_setperf() from aMark Kettenis
timeout. Unfortunately the smu(4) CPU voltage slewing code sleeps, which causes a kernel panic. Prevent this by delegating the CPU frequency switching and voltage slewing to a task. ok mpi@
2015-06-04regenDariusz Swiderski
2015-06-04Add more of Tolopai (EP80579) Gigabit controllers id.Dariusz Swiderski
2015-06-04Check if interface was stopped before calling rx/tx interrupt routines.Mike Belopuhov
Report & tests by mxb@alumni.chalmers.se, thanks! OK deraadt, chris
2015-06-04Remove unused sa_dl.Martin Pieuchot
2015-06-04Switch intel_gmbus_is_port_valid and intel_gmbus_is_forced_bit fromJonathan Gray
extern inline back to static inline so the kernel will build on compilers that default to c99 inline semantics.
2015-06-04use mallocarray instead of malloc in drm_callocJonathan Gray
2015-06-04remove the now unused alawtolin16 tableJonathan Gray
ok ratchov@
2015-06-03Adjust yielding condition slightly in the if_input_process thread.Mike Belopuhov
ok mpi, kettenis
2015-06-03Fix pf_map_addr() not to cause dividing by 0. This fixes problem whenYASUOKA Masahiko
using table or dynamic interface addresses for source-hash. Also avoid calling arc4random_uniform() with upper_bound == 0. ok mikeb
2015-06-03Support for U4, missed in previous.Martin Pieuchot
ok kettenis@, miod@, dlg@
2015-06-03Check for the correct bit in the interrupts property of the device-treeMartin Pieuchot
to determin if interrupts should be established as edge/level triggered. Fix audio interrupts on U4 systems. On such systems the "interrupts" fields in the device-tree has more bits set and cannot be compared to 0.
2015-06-03Add hpb(4), reminded by Brad.Martin Pieuchot
2015-06-03there's been a long standing issue in ppp on a tty/serial line where it ↵David Gwynne
allocates mbufs at IPL_SOFTTTY, which is above the IPL_NET the mbuf layer protects itself at. recent improvements to diagnostics in pools and mbufs now panic instead of letting these things silently corrupt. this reworks the ppp handling in the tty layer so it has its own private pool to allocate packet memory out of. these packets get built and then queued for softnet to process. softnet dequeues the packet and attaches it to mbufs as external storage before handing it on to the rest of the stack. this was reported on bugs@ and tested by both Walter Daugherity and Martin van den Nieuwelaar ok deraadt@ mpi@
2015-06-02Add missing define for hpb(4).Martin Pieuchot
2015-06-02Add a new HT-PCI bridge driver and the necessary glue to openpic(4)Martin Pieuchot
to get interrupts working on U4 machines. With this OpenBSD can run on PowerMac11,2 (Quad G5). With inputs from and ok kettenis@, miod@, dlg@
2015-06-02RIP ether_input_mbuf().Martin Pieuchot
2015-06-02Use if_input() instead of ether_input_mbuf().Martin Pieuchot
ok jasper@, bluhm@
2015-06-02Take carp(4) out of ether_input().Martin Pieuchot
Tested by <mxb AT alumni DOT chalmers DOT se>, thanks! ok bluhm@, dlg@
2015-06-02Override pie range constants (well, only VM_PIE_MAX_ADDR) with a variableMiod Vallat
which value is decided at runtime, in order to only enable PIE on sun4m which has a large enough address space.
2015-06-02with binutils 2.17 we can change some raw opcodes into instruction namesJonathan Gray
ok miod@ deraadt@
2015-06-01regenStefan Sperling
2015-06-01fix typo: Wirelsss -> WirelessStefan Sperling
2015-06-01Convert tun(4) to if_input().Martin Pieuchot
Tested by Norman Golisz and <mxb AT alumni DOT chalmers DOT se>, thanks! ok bluhm@
2015-05-31If the first list was empty, ml_join() did not not clear the secondAlexander Bluhm
list after transferring all elements away. Reorder the conditionals to make sure that ml_init() is always called for a non empty second list. This makes all cases consistent and is less surprising. OK dlg@
2015-05-30Remove commented out DRMDEBUG/DRM_DEBUG lines. Other drivers don't haveJonathan Gray
similiar lines so drm shouldn't either.