From 273f81db66867242ea47adbe30fb879f282fc185 Mon Sep 17 00:00:00 2001 From: Miod Vallat Date: Mon, 16 Apr 2012 22:23:07 +0000 Subject: Move proc0 and trap handler setup before consinit(), but still wait for the initial setup to be complete before switching to our trap handlers. However, change guarded_{read,write}_* to clear BEV in the coprocessor 0 status register, and restore it afterwards, to use our fault handlers within these functions. This makes these functions usable from consinit(). --- sys/arch/mips64/mips64/lcore_access.S | 53 ++++++++++++++++++++++++- sys/arch/sgi/sgi/machdep.c | 73 ++++++++++++++++------------------- 2 files changed, 85 insertions(+), 41 deletions(-) diff --git a/sys/arch/mips64/mips64/lcore_access.S b/sys/arch/mips64/mips64/lcore_access.S index c48b44ef6fa..3317c3363c4 100644 --- a/sys/arch/mips64/mips64/lcore_access.S +++ b/sys/arch/mips64/mips64/lcore_access.S @@ -1,4 +1,4 @@ -/* $OpenBSD: lcore_access.S,v 1.20 2012/03/28 20:44:23 miod Exp $ */ +/* $OpenBSD: lcore_access.S,v 1.21 2012/04/16 22:23:04 miod Exp $ */ /* * Copyright (c) 2001-2003 Opsycon AB (www.opsycon.se / www.opsycon.com) @@ -295,12 +295,24 @@ _kcopyerr: LEAF(guarded_read_1, 0) GET_CPU_INFO(t1, t0) PTR_L t3, CI_CURPROCPADDR(t1) + + li a3, SR_BOOT_EXC_VEC + mfc0 a2, COP_0_STATUS_REG + or a4, a2, a3 + xor a4, a4, a3 + li v0, KT_GUARDERR lw v1, PCB_ONFAULT(t3) sw v0, PCB_ONFAULT(t3) + mtc0 a4, COP_0_STATUS_REG + NOP + lb v0, 0(a0) sb v0, 0(a1) + + mtc0 a2, COP_0_STATUS_REG + NOP sw v1, PCB_ONFAULT(t3) j ra @@ -310,13 +322,25 @@ END(guarded_read_1) LEAF(guarded_read_2, 0) GET_CPU_INFO(t1, t0) PTR_L t3, CI_CURPROCPADDR(t1) + + li a3, SR_BOOT_EXC_VEC + mfc0 a2, COP_0_STATUS_REG + or a4, a2, a3 + xor a4, a4, a3 + li v0, KT_GUARDERR lw v1, PCB_ONFAULT(t3) sw v0, PCB_ONFAULT(t3) + mtc0 a4, COP_0_STATUS_REG + NOP + lh v0, 0(a0) sh v0, 0(a1) + mtc0 a2, COP_0_STATUS_REG + NOP + sw v1, PCB_ONFAULT(t3) j ra move v0, zero @@ -325,13 +349,25 @@ END(guarded_read_2) LEAF(guarded_read_4, 0) GET_CPU_INFO(t1, t0) PTR_L t3, CI_CURPROCPADDR(t1) + + li a3, SR_BOOT_EXC_VEC + mfc0 a2, COP_0_STATUS_REG + or a4, a2, a3 + xor a4, a4, a3 + li v0, KT_GUARDERR lw v1, PCB_ONFAULT(t3) sw v0, PCB_ONFAULT(t3) + mtc0 a4, COP_0_STATUS_REG + NOP + lw v0, 0(a0) sw v0, 0(a1) + mtc0 a2, COP_0_STATUS_REG + NOP + sw v1, PCB_ONFAULT(t3) j ra move v0, zero @@ -340,18 +376,33 @@ END(guarded_read_4) LEAF(guarded_write_4, 0) GET_CPU_INFO(t1, t0) PTR_L t3, CI_CURPROCPADDR(t1) + + li a3, SR_BOOT_EXC_VEC + mfc0 a2, COP_0_STATUS_REG + or a4, a2, a3 + xor a4, a4, a3 + li v0, KT_GUARDERR lw v1, PCB_ONFAULT(t3) sw v0, PCB_ONFAULT(t3) + mtc0 a4, COP_0_STATUS_REG + NOP + sw a1, 0(a0) + mtc0 a2, COP_0_STATUS_REG + NOP + sw v1, PCB_ONFAULT(t3) j ra move v0, zero END(guarded_write_4) _guarderr: + mtc0 a2, COP_0_STATUS_REG + NOP + sw v1, PCB_ONFAULT(t3) j ra li v0, EFAULT # return error diff --git a/sys/arch/sgi/sgi/machdep.c b/sys/arch/sgi/sgi/machdep.c index d4fa84805cd..1a5e21559f1 100644 --- a/sys/arch/sgi/sgi/machdep.c +++ b/sys/arch/sgi/sgi/machdep.c @@ -1,4 +1,4 @@ -/* $OpenBSD: machdep.c,v 1.118 2012/04/09 16:54:40 miod Exp $ */ +/* $OpenBSD: machdep.c,v 1.119 2012/04/16 22:23:06 miod Exp $ */ /* * Copyright (c) 2003-2004 Opsycon AB (www.opsycon.se / www.opsycon.com) @@ -121,7 +121,6 @@ caddr_t ekern; struct phys_mem_desc mem_layout[MAXMEMSEGS]; caddr_t mips_init(int, void *, caddr_t); -void initcpu(void); void dumpsys(void); void dumpconf(void); @@ -497,31 +496,6 @@ mips_init(int argc, void *argv, caddr_t boot_esym) tlb_flush(bootcpu_hwinfo.tlbsize); tlb_set_wired(UPAGES / 2); - /* - * Get a console, very early but after initial mapping setup. - */ - consinit(); - printf("Initial setup done, switching console.\n"); - - /* - * Init message buffer. - */ - msgbufbase = (caddr_t)pmap_steal_memory(MSGBUFSIZE, NULL, NULL); - initmsgbuf(msgbufbase, MSGBUFSIZE); - - /* - * Allocate U page(s) for proc[0], pm_tlbpid 1. - */ - proc0.p_addr = proc0paddr = curcpu()->ci_curprocpaddr = - (struct user *)pmap_steal_memory(USPACE, NULL, NULL); - proc0.p_md.md_regs = (struct trap_frame *)&proc0paddr->u_pcb.pcb_regs; - tlb_set_pid(1); - - /* - * Bootstrap VM system. - */ - pmap_bootstrap(); - /* * Copy down exception vector code. */ @@ -576,6 +550,35 @@ mips_init(int argc, void *argv, caddr_t boot_esym) build_trampoline(TLB_MISS_EXC_VEC, xtlb_handler); build_trampoline(XTLB_MISS_EXC_VEC, xtlb_handler); + /* + * Allocate U page(s) for proc[0], pm_tlbpid 1. + */ + proc0.p_addr = proc0paddr = curcpu()->ci_curprocpaddr = + (struct user *)pmap_steal_memory(USPACE, NULL, NULL); + proc0.p_md.md_regs = (struct trap_frame *)&proc0paddr->u_pcb.pcb_regs; + tlb_set_pid(1); + + /* + * Get a console, very early but after initial mapping setup + * and exception handler setup - console probe code might need + * to invoke guarded_read(), and this needs our handlers to be + * available. + */ + consinit(); + printf("Initial setup done, switching console.\n"); + + /* + * Init message buffer. + */ + msgbufbase = (caddr_t)pmap_steal_memory(MSGBUFSIZE, NULL, NULL); + initmsgbuf(msgbufbase, MSGBUFSIZE); + + /* + * Bootstrap VM system. + */ + tlb_set_pid(1); + pmap_bootstrap(); + /* * Turn off bootstrap exception vectors. */ @@ -655,15 +658,15 @@ dobootopts(int argc, void *argv) /* - * Console initialization: called early on from main, before vm init or startup. + * Console initialization: called early on from mips_init(), before vm init + * is completed. * Do enough configuration to choose and initialize a console. */ void consinit() { - if (console_ok) { + if (console_ok) return; - } cninit(); console_ok = 1; } @@ -709,11 +712,6 @@ cpu_startup() printf("avail mem = %lu (%luMB)\n", ptoa((psize_t)uvmexp.free), ptoa((psize_t)uvmexp.free)/1024/1024); - /* - * Set up CPU-specific registers, cache, etc. - */ - initcpu(); - /* * Set up buffers, so they can be used to read disk labels. */ @@ -939,11 +937,6 @@ dumpsys() #endif } -void -initcpu() -{ -} - boolean_t is_memory_range(paddr_t pa, psize_t len, psize_t limit) { -- cgit v1.2.3