From 3465f5fbfb39c3ac75aec382cee02f481a908fcf Mon Sep 17 00:00:00 2001 From: Miod Vallat Date: Fri, 2 Jan 2004 23:45:04 +0000 Subject: MC88110 errata states that, for instruction faults, in case of bus error trap class, the value of the page fault and segment fault bits are undefined; so check for bus error first. --- sys/arch/mvme88k/mvme88k/trap.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/sys/arch/mvme88k/mvme88k/trap.c b/sys/arch/mvme88k/mvme88k/trap.c index fd2c3ad1369..050e1fc7ae2 100644 --- a/sys/arch/mvme88k/mvme88k/trap.c +++ b/sys/arch/mvme88k/mvme88k/trap.c @@ -1,4 +1,4 @@ -/* $OpenBSD: trap.c,v 1.62 2003/12/24 15:30:13 miod Exp $ */ +/* $OpenBSD: trap.c,v 1.63 2004/01/02 23:45:03 miod Exp $ */ /* * Copyright (c) 1998 Steve Murphree, Jr. * Copyright (c) 1996 Nivas Madhur @@ -953,16 +953,16 @@ m88110_user_fault: } } else { /* instruction faults */ + if (frame->isr & + (CMMU_ISR_BE | CMMU_ISR_SP | CMMU_ISR_TBE)) { + /* bus error, supervisor protection */ + result = EACCES; + } else if (frame->isr & (CMMU_ISR_SI | CMMU_ISR_PI)) { /* segment or page fault */ result = uvm_fault(map, va, VM_FAULT_INVALID, ftype); if (result == EACCES) result = EFAULT; - } else - if (frame->isr & - (CMMU_ISR_BE | CMMU_ISR_SP | CMMU_ISR_TBE)) { - /* bus error, supervisor protection */ - result = EACCES; } else { #ifdef DEBUG printf("unexpected instr fault dsr %x\n", -- cgit v1.2.3